IP Library Granted Patent US 6,839,271
Granted Patent B1
US 6,839,271 · App. 10/685,618 · Granted Jan 4, 2005

Magnetic memory device

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Quick Facts
Patent No.
US 6,839,271
App. No.
10/685,618
Granted
Jan 4, 2005
Kind
B1
Abstract

A magnetic memory device which comprises a magnetic memory cell that includes a magnetic material switchable between two resistive states on the application of a magnetic field. The device also comprises a wire that is connected to the magnetic memory cell and has a conductive connecting link and a conductive word or bit line which are electrically connected to each other. The connecting link is disposed between the word or bit line and the magnetic memory cell and has a thermal resistance that is larger than that of the word or bit line so as to provide a barrier for heat conduction from the magnetic memory cell to the word or bit line.

Claims (26)

1. A magnetic memory (MRAM) device comprising:

an array of magnetic memory cells each with a magnetic data layer that can be switched between states, wherein switching is more readily accomplished at higher local temperatures;

a grid of bit and word lines connected to and providing for data access to the array, wherein both a thermal and electrical conductive path exists for each magnetic memory cell in the array to the grid; and

a plurality of thermally resistrictive links that electrically connect each respective magnetic memory cell in the array to corresponding points in the grid, and that increase the thermal resistance to heat generated in each of said magnetic memory cells;

wherein, during operation an active magnetic memory cell is caused to heat to a higher temperature than otherwise because the corresponding thermally resistrictive link interfers with its heat sinking to respective bit and word lines, and therefore switches magnetic states with less applied energy.

2. The MRAM of claim 1 , wherein:

the plurality of thermally resistrictive links are each fabricated as metallic three-dimensional cones or pyramids.

3. The MRAM of claim 1 , wherein:

the plurality of thermally resistrictive links are each fabricated as metallic vias with cross sections smaller than the adjacent bit or word line.

4. The MRAM of claim 1 , wherein:

the plurality of thermally resistrictive links are each fabricated of a less thermally conductive material than the word or bit lines.

5. A method for improving a magnetic memory (MRAM) device comprising:

laying out an array of magnetic memory cells each with a magnetic data layer that can be switched between states, wherein switching is more readily accomplished at higher local temperatures;

connecting a grid of bit and word lines to and providing for data access to the array, wherein both a thermal and electrical conductive path exists for each magnetic memory cell in the array to the grid; and

electrically connecting a plurality of thermally resistrictive links to each respective magnetic memory cell in the array that increase the thermal resistance to heat generated in each of said magnetic memory cells;

wherein, during operation an active magnetic memory cell is caused to heat to a higher temperature than otherwise because the corresponding thermally resistrictive link interfers with its heat sinking to respective bit and word lines, and therefore switches magnetic states with less applied energy.

6. A magnetic memory (MRAM) device comprising:

an array of magnetic memory cells each with a magnetic data layer that can be switched between states, wherein switching is more readily accomplished at higher local temperatures;

a grid of bit and word lines connected to and providing for data access to the array, wherein both a thermal and electrical conductive path exists for each magnetic memory cell in the array to the grid; and

a plurality of thermally resistrictive rail facings that electrically connect each respective magnetic memory cell in the array to corresponding points in the grid, and that increase the thermal resistance to heat generated in each of said magnetic memory cells;

wherein, the plurality of thermally resistrictive rail facings are respectively disposed rail-for-rail on at least one of the bit and word lines in full contact along a row or column of the magnetic memory cells; and

wherein, during operation an active magnetic memory cell is caused to heat to a higher temperature than otherwise because the corresponding thermally resistrictive link interfers with its heat sinking to respective bit and word lines, and therefore switches magnetic states with less applied energy.

7. The MRAM of claim 6 , wherein:

the plurality of thermally resistrictive rail facings are each fabricated as reduced cross-sectional area wires compared to the word and bit lines.

8. The MRAM of claim 6 , wherein:

the plurality of thermally resistrictive rail facings are each fabricated with materials having reduced thermal conductivity compared to the word and bit lines.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2007
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 019733/0202 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2003
From: ANTHONY, THOMAS C.; PERNER, FREDERICK A.; LEE, HEON
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 014171/0272 →