Semiconductor device, semiconductor package for use therein, and manufacturing method thereof
View Patent ↗A semiconductor package includes a substrate for mounting and fixing a semiconductor chip thereon and a connecting pattern. The substrate is provided with an elongate opening formed therein. The semiconductor chip is fixed with its surface being mounted on the substrate and with its electrode being aligned within the elongate opening. The electrode of the semiconductor chip is electrically connected to the connecting pattern via wires through the elongate opening. The elongate opening and the wires are sealed with resin.
1. A semiconductor device comprising:
a substrate having a first surface and a second surface opposed to the first surface, said substrate futher having an elongate opening defined therethrough from the first surface to the second surface;
a plurality of connecting patterns located on the second surface of said substrate, each of said plurality of connecting patterns having a first end;
a semiconductor chip having a surface which is mounted to the first surface of said substrate;
a plurality of electrodes located on the surface of said semiconductor chip and aligned with said elongate opening of said substrate;
a plurality of wires extending within said elongate opening of said substrate, first ends of said plurality of wires being respectively bonded to said plurality of electrodes and second ends of said plurality of wires being respectively bonded to corresponding ones of said plurality of connecting patterns;
a resin which covers said plurality of electrodes, said plurality of wires, and the first ends of said plurality of connecting patterns;
a resist which covers side walls of said plurality of connecting patterns and second ends of said plurality of connecting patterns; and
a plurality of external connecting terminals respectively bonded to the second ends of said plurality of connecting patterns through said resist,
wherein said resin extends out of said elongate opening beyond a height of said plurality of connecting patterns at which said plurality of external connecting terminals are bonded.
2. A semiconductor device as claimed in claim 1 , wherein said substrate includes an upper plate and a lower plate which define a step configuration in the second surface of said substrate, wherein the upper plate is located between said semiconductor chip and said lower plate, and wherein said plurality of connecting patterns extend continuously from the upper plate to the lower plate such that the first ends of said plurality of connecting patterns are located on the upper plate.
3. A semiconductor device as claimed in claim 1 , wherein said elongate opening is smaller than said semiconductor chip.
4. A semiconductor device according to claim 1 , further comprising a bonding material formed on an entirety of the first surface of said substrate, wherein said semiconductor chip is mounted on the first surface of said substrate via said bonding material.
5. A semiconductor device according to claim 1 , wherein said plurality of external connecting terminals are solder balls.
6. A semiconductor device comprising:
a substrate having a first surface and a second surface opposed to the first surface, said substrate futher having an elongate opening defined therethrough from the first surface to the second surface;
a plurality of connecting patterns located on the second surface of said substrate, each of said plurality of connecting patterns having a first end;
a semiconductor chip having a surface which is mounted to the first surface of said substrate;
a plurality of electrodes located on the surface of said semiconductor chip and aligned with said elongate opening of said substrate;
a plurality of wires extending within said elongate opening of said substrate, first ends of said plurality of wires being respectively bonded to said plurality of electrodes and second ends of said plurality of wires being respectively bonded to corresponding ones of said plurality of connecting patterns;
a resin which covers said plurality of electrodes, said plurality of wires, and the first ends of said plurality of connecting patterns;
a resist which covers side walls of said plurality of connecting patterns and second ends of said plurality of connecting patterns; and
a plurality of external connecting terminals respectively bonded to the second ends of said plurality of connecting patterns through said resist,
wherein said resin extends out of said elongate opening less than a height of said plurality of connecting patterns at which said plurality of external connecting terminals are bonded.
7. A semiconductor device comprising:
a substrate having a first surface and a second surface opposed to the first surface, said substrate further having first and second elongate openings defined therethrough from the first surface to the second surface;
a plurality of connecting patterns located on the second surface of said substrate, each of said plurality of connecting patterns having a first end;
a semiconductor chip having a surface which is mounted to the first surface of said substrate;
a plurality of electrodes located on the surface of said semiconductor chip, each of said plurality of electrodes aligned with one of said first and second elongate openings of said substrate;
a plurality of wires each extending within one of said first and second elongate openings of said substrate, first ends of said plurality of wires being respectively bonded to said plurality of electrodes and second ends of said plurality of wires being respectively bonded to corresponding ones of said plurality of connecting patterns;
a resin which covers said plurality of electrodes, said plurality of wires, and the first ends of said plurality of connecting patterns;
a resist which covers side walls of said plurality of connecting patterns and second ends of said plurality of connecting patterns; and
a plurality of external connecting terminals respectively bonded to the second ends of said plurality of connecting patterns through said resist,
wherein said resin extends out of said first and second elongate openings beyond a height of said plurality of connecting patterns at which said plurality of external connecting terminals are bonded.
8. A semiconductor device as claimed in claim 7 , wherein said substrate includes an upper plate and a lower plate which define a step configuration in the second surface of said substrate, wherein the upper plate is located between said semiconductor chip and the lower plate, and wherein said plurality of connecting patterns extend continuously from the upper plate to the lower plate such that the first ends of said plurality of connecting patterns are located on the upper plate.
9. A semiconductor device as claimed in claim 7 , wherein said first and second elongate openings are smaller than said semiconductor chip.
10. A semiconductor device according to claim 7 , further comprising a bonding material formed on an entirety of the first surface of said substrate, wherein said semiconductor chip is mounted on the first surface of said substrate via said bonding material.
11. A semiconductor device according to claim 7 , wherein said plurality of external connecting terminals are solder balls.
12. A semiconductor device comprising:
a substrate having a first surface and a second surface opposed to the first surface, said substrate further having first and second elongate openings defined therethrough from the first surface to the second surface;
a plurality of connecting patterns located on the second surface of said substrate, each of said plurality of connecting patterns having a first end;
a semiconductor chip having a surface which is mounted to the first surface of said substrate;
a plurality of electrodes located on the surface of said semiconductor chip, each of said plurality of electrodes aligned with one of said first and second elongate openings of said substrate;
a plurality of wires each extending within one of said first and second elongate openings of said substrate, first ends of said plurality of wires being respectively bonded to said plurality of electrodes and second ends of said plurality of wires being respectively bonded to corresponding ones of said plurality of connecting patterns;
a resin which covers said plurality of electrodes, said plurality of wires, and the first ends of said plurality of connecting patterns;
a resist which covers side walls of said plurality of connecting patterns and second ends of said plurality of connecting patterns; and
a plurality of external connecting terminals respectively bonded to the second ends of said plurality of connecting patterns through said resist,
wherein said resin extends out of said first and second elongate openings less than a height of said plurality of connecting patterns at which said plurality of external connecting terminals are bonded.