System having a storage controller that modifies operation of a storage system based on the status of a data transfer
View Patent ↗A system comprises a storage controller for managing transfers of data between a host and storage memory; a data mover coupled to the storage controller handling data transferred between a host and storage memory; and a buffer coupled to the data mover for storing data being transferred. The storage controller modifies operation of the storage system based on status of the data transfer. An associate method comprises transferring data between a host and storage memory via a storage system, and dynamically adjusting operation of the storage system depending on status of the data transfer.
1. A storage system, comprising:
a storage controller for managing transfers of data between a host and storage memory,
a data mover coupled to the storage controller, the data mover handles data transferred between the host and the storage memory; and
a buffer coupled to the data mover for storing data being transferred between the host and the storage memory;
a storage memory interface coupled to the data mover, the storage memory interface handles data transferred to and from storage memory, the storage memoy interface also including error correction logic;
wherein, to conserve power, the storage controller selectively turns off a portion of the storage system based on an amount of data in the buffer,
wherein the storage controller turns off the error correction logic of the storage memory interface in the storage system if the amount of data in the buffer reaches a threshold amount.
2. The storage system of claim 1 wherein the storage controller selectively turns off a portion of the storage system based on a capacity of the buffer.
3. The storage system of claim 1 wherein data is transferred between the data mover and host at a first transfer rate, and data is transferred between the data mover and storage memory at a second transfer rate, and wherein the storage controller selectively matches the first and second transfer rates.
4. The system of claim 1 wherein the error correction logic of the storage memory interface comprises:
an encoder for encoding data to be stored in storage memory; and
a decoder for decoding data retrieved from storage memory;
wherein the storage controller turns off the decoder in the error correction logic of the storage memory interface if the amount of data in the buffer reaches a threshold amount.
5. The system of claim 4 wherein the storage controller turns off the decoder by disconnecting power to the decoder.
6. The system of claim 4 wherein the storage controller turns off the decoder by disconnecting a clock signal to the decoder.