IP Library Granted Patent US 7,290,155
Granted Patent B2
US 7,290,155 · App. 10/696,469 · Granted Oct 30, 2007

Method, system, and apparatus for dynamically configuring the operating point utilized for thermal management of an integrated circuit

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 7,290,155
App. No.
10/696,469
Granted
Oct 30, 2007
Kind
B2
Abstract

Methods and circuits to define a thermal operating mode for a integrated device by defining an operating voltage and a frequency range.

Claims (23)

1. A method comprising:

enabling a reduced power operating mode in response to a thermal condition for an integrated device;

changing the integrated device's voltage from a first voltage to a second voltage upon activation of the reduced power operating mode;

operating the integrated device at a frequency within an operating range based at least in part on a desired amount of power reduction, wherein a bus ratio utilized in the reduced power operating mode is less than a maximum bus ratio for the integrated device and is calculated based on subtraction of an offset from the maximum bus ratio, the offset is based at least in part on a supported bus frequency of the integrated device.

2. The method of claim 1 wherein the first voltage is a nominal operating voltage and the second voltage is a reduced voltage that is defined during manufacture of the integrated device.

3. The method of claim 2 wherein the second voltage is stored into a plurality of fuses.

4. The method of claim 1 wherein the integrated device is a processor.

5. An apparatus comprising:

a thermal monitor to be enabled if a temperature of an integrated circuit meets or exceeds a threshold value;

a multiplexer to receive a plurality of offset values and a bus frequency that is supported by the integrated circuit and to forward one of the offset values based at least in part on the bus frequency; and

a logic unit to determine a thermal event bus ratio based on a difference between an initial bus ratio and the selected offset value, determine if the thermal event bus ratio is at least equal to a minimum bus ratio, and to change a voltage and frequency of the integrated circuit if the temperature meets or exceeds the threshold value.

6. The apparatus of claim 5 , wherein the thermal monitor is to be disabled if the thermal event bus ratio is below the minimum bus ratio.

7. The apparatus of claim 6 , wherein the integrated circuit comprises a processor.

8. The apparatus of claim 5 , wherein the changed voltage corresponds to a lowest voltage capable of operation of the integrated circuit in response to a thermal issue.

9. The apparatus of claim 8 , wherein a value of the changed voltage is stored in a fuse of the integrated circuit.

10. The apparatus of claim 8 , wherein the changed frequency in response to the thermal issue is within an operating range between the minimum bus ratio and a maximum thermal event bus ratio available at the lowest voltage.

11. A system comprising:

a processor including a thermal monitor to be enabled if a temperature of the processor is at least at a threshold value, a multiplexer to receive a plurality of offset values and a bus frequency that is supported by the processor and to forward one of the offset values based at least in part on the bus frequency, and a logic unit to determine a thermal event bus ratio based on a difference between an initial bus ratio and the selected offset value, determine if the thermal event bus ratio is at least equal to a minimum bus ratio, and to change a voltage and frequency of the processor if the temperature is at least at the threshold value; and

a memory coupled to the processor via a chipset.

12. The system of claim 11 , wherein the thermal monitor is to be disabled if the thermal event bus ratio is below the minimum bus ratio.

13. The system of claim 12 , wherein the changed voltage corresponds to a lowest voltage capable of operation of the processor in response to a thermal issue.

14. The system of claim 13 , wherein a value of the changed voltage is stored in a fuse of the processor.

15. The system of claim 14 , wherein the changed frequency in response to the thermal issue is within an operating range between the minimum bus ratio and a maximum thermal event bus ratio available at the lowest voltage.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2014
From: INTEL CORPORATION
To: SONY CORPORATION OF AMERICA
Reel/Frame 032893/0199 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2004
From: GEORGE, VARGHESE; GUNTHER, STEPHEN H.; JAHAGIRDAR, SANJEEV; SODHI, INDER
To: INTEL CORPORATION
Reel/Frame 015228/0914 →
Continuity (1)
Related Publication 20050091548A1 · Apr 28, 2005