Formation of a double gate structure
View Patent ↗A method of forming a double gate structure including sidewalls of substantially similar vertical profile. One photoresist masking step is used to define the top gate, which is then used as a mask to define the bottom gate. The bottom polysilicon layer is etched by a physical and chemical process combination to form a bottom gate with vertical sidewalls substantially inline with the sidewalls of the top gate.
1. A method to form a double gate structure, comprising:
providing a first polysilicon layer over a substrate;
providing a second polysilicon layer over the first polysilicon layer;
etching the second polysilicon layer through a photoresist mask to form a control gate having sidewalls, wherein a first polymer is formed on the control gate sidewalls during the etch;
providing a gas flow including a fluorocarbon;
applying a quantity of power to the gas flow to form a plasma; and
etching the first polysilicon layer with the plasma to form a floating gate having sidewalls substantially inline with the control gate sidewalls wherein a second polymer is formed on the floating gate sidewalls during the etch, the second polymer being different than the first polymer.
2. The method of claim 1 , wherein the first polysilicon layer has a thickness between about 1,620 Å and about 1,980 Å.
3. The method of claim 1 , wherein the second polysilicon layer has a thickness substantially similar to the thickness of the first polysilicon layer.
4. The method of claim 1 , wherein the control gate sidewalls and floating gate sidewalls have a substantially similar vertical profile.
5. The method of claim 4 , wherein the control gate and the floating gate have a width between about 0.14 μm and about 0.18 μm.
6. The method of claim 1 , wherein the gas flow includes CH 2 F 2 , O 2 , and HBr.
7. The method of claim 6 , wherein the gas flow includes CH 2 F 2 and O 2 at a flowrate ratio of about 3:5.
8. The method of claim 6 , wherein the gas flow includes HBr at a flow rate between about 100 sccm and about 300 sccm.
9. The method of claim 6 , wherein the gas flow includes CH 2 F 2 at a flow rate between about 3 sccm and about 5 sccm.
10. The method of claim 6 , wherein the gas flow includes about 1% by volume of CH 2 F 2 .
11. The method of claim 6 , wherein the gas flow includes O 2 and He (at 20% O 2 ) at a flow rate between about 5 sccm and about 10 sccm.
12. The method of claim 1 , wherein a polymer is formed on the floating gate sidewalls during the etch to protect the floating gate sidewalls from etching material.
13. The method of claim 12 , wherein the polymer includes (CH 2 ) n where n is an integer.
14. The method of claim 1 , further comprising providing a silicon oxide layer above the substrate and under the first polysilicon layer.
15. The method of claim 14 , wherein the silicon oxide layer has a thickness between about 40 Å and about 80 Å.
16. The method of claim 1 , further comprising:
providing a dielectric stack between the first polysilicon layer and the second polysilicon layer; and
etching the dielectric stack to form sidewalls with substantially similar vertical profile as the control gate sidewalls.
17. The method of claim 1 , further comprising:
providing a silicon nitride layer above the second polysilicon layer; and
etching the silicon nitride layer through the photoresist mask.
18. A method of forming a double gate structure, comprising:
providing a first polysilicon layer over a substrate;
providing a second polysilicon layer over the first polysilicon layer;
etching the second polysilicon layer through a photoresist mask to form a control gate including sidewalls, wherein a first polymer is formed on the control gate sidewalls during the etch wherein the first polymer includes C x Cl y , where x and y are integers;
removing the photoresist mask and the first polymer;
providing a silicon oxide layer over the control gate sidewalls;
providing a first gas flow including a fluorocarbon;
applying a first quantity of power to the first gas flow to form a first plasma; and
etching the first polysilicon layer with the first plasma to form a floating gate including sidewalls substantially inline with the control gate sidewalls, wherein a fluorocarbon polymer is formed on the floating gate sidewalls during the etch.
19. The method of claim 18 , wherein the silicon oxide layer over the control gate sidewalls has a thickness between about 30 Å and about 40 Å.
20. The method of claim 19 , wherein the second polymer includes (CH 2 ) n where n is an integer.
21. A method of forming a double gate structure, comprising:
providing a first polysilicon layer over a substrate;
providing a dielectric stack over the first polysilicon layer;
providing a second polysilicon layer over the dielectric stack;
providing a silicon nitride layer over the second polysilicon layer;
providing a photoresist mask over the silicon nitride layer;
etching the silicon nitride layer and the second polysilicon layer through the photoresist mask to form a control gate including sidewalls, wherein a first polymer of C x Cl y , where x and y are integers is formed on the control gate sidewalls during the etch;
removing the photoresist mask and the first polymer;
providing a silicon oxide layer over the control gate sidewalls;
etching the dielectric stack to form sidewalls with substantially similar vertical profile as the control gate sidewalls;
providing a first gas flow including a fluorocarbon;
applying a first quantity of power to the first gas flow to form a first plasma; and
etching the first polysilicon layer with the first plasma to form a floating gate including sidewalls substantially inline with the control gate sidewalls, wherein a fluorocarbon polymer is formed on the floating gate sidewalls during the etch.
22. The method of claim 21 , wherein the dielectric stack includes a nitride layer between two oxide layers.
23. The method of claim 21 , wherein the second polymer includes (CH 2 ) n where n is an integer.