IP Library Granted Patent US 7,002,190
Granted Patent B1
US 7,002,190 · App. 10/711,479 · Granted Feb 21, 2006

Method of collector formation in BiCMOS technology

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,002,190
App. No.
10/711,479
Granted
Feb 21, 2006
Kind
B1
Abstract

A heterobipolar transistor (HBT) for high-speed BiCMOS applications is provided in which the collector resistance, Rc, is lowered by providing a buried refractory metal silicide layer underneath the shallow trench isolation region on the subcollector of the device. Specifically, the HBT of the present invention includes a substrate including at least a subcollector; a buried refractory metal silicide layer located on the subcollector; and a shallow trench isolation region located on a surface of the buried refractory metal silicide layer. The present invention also provides a method of fabricating such a HBT. The method includes forming a buried refractory metal silicide underneath the shallow trench isolation region on the subcollector of the device.

Claims (16)

1. A heterobipolar transistor (HBT) comprising:

a substrate including at least a subcollector;

a buried refractory metal silicide layer located on the subcollector; and

a shallow trench isolation region located on a surface of said buried refractory metal silicide layer, wherein said buried refractory metal silicide layer extends beyond the edges of the shallow trench isolation region such that a portion of said buried refractory metal silicide layer is present in an undercut region.

2. The HBT of claim 1 wherein said substrate comprising a semiconductor substrate selected from the group consisting of Si, SiGe, SiC, SiGeC, GaAs, InAs, InP, silicon-on-insulators, silicon germanium-on-insulators, and other III/V or II/VI compound semiconductors.

3. The HBT of claim 2 wherein said semiconductor substrate is Si-containing.

4. The HBT of claim 1 wherein said subcollector is doped with C.

5. The HBT of claim 1 wherein said shallow trench isolation region and said buried refractory metal silicide layer are located in an opening that comprises nitride or oxynitride spacers.

6. The HBT of claim 1 wherein said refractory metal silicide layer comprises a silicide of Ti, Co, W, Ta, Ni or alloys thereof.

7. The HBT of claim 6 wherein said refractory metal silicide layer comprises a silicide of Co, Ta or W.

8. The HBT of claim 7 wherein said refractory metal silicide layer comprises a silicide of W.

9. The HBT of claim 1 wherein said shallow trench isolation region comprises a trench dielectric material.

10. The HBT of claim 1 wherein said refractory metal silicide layer comprises a silicide of Ti, Co, W, Ta, Ni or alloys thereof.

11. The HBT of claim 10 wherein said refractory metal silicide layer comprises a silicide of Co, Ta or W.

12. The HBT of claim 11 wherein said refractory metal silicide layer comprises a silicide of W.

13. The HBT of claim 1 further comprising a SiGe base and a polySi emitter located on said substrate including said subcollector.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 26, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 054528/0023 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 21, 2004
From: GEISS, PETER J.; GRAY, PETER B.; JOSEPH, ALVIN J.; LIU, QIZHI
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 015154/0174 →