Semiconductor device and method of forming the same
View Patent ↗A highly-integrated, high speed semiconductor device includes a device isolation film defining an active region at a SOI wafer having a stacked structure of a first silicon layer, a filled insulating film and a second silicon layer—the second silicon layer being the active region between the device isolation film with an intervening first silicide layer; the first silicide layer formed on a gate electrode on the active region and an impurity junction region; and a second silicide layer intervening at the interface of a device isolation film and a second silicon layer and connected to the first silicide layer. Thus, operating characteristics of the device are improved by minimizing the resistance of an impurity junction region and reducing the manufacturing cost.
1. A semiconductor device, comprising:
a SOI wafer having a stacked structure of a first silicon layer, a buried insulating film and a second silicon layer;
a device isolation film disposed in the second silicon layer, wherein the device isolation film defines an active region of the SOI wafer;
a gate electrode having a gate insulation film disposed on the active region of the SOI wafer;
an insulation spacer disposed at side walls of the gate electrode;
impurity junction regions disposed at both sides of the gate electrode in the active region of the SOI wafer;
a first silicide layer disposed at an interface of the impurity junction region and the device isolation film; and
a second silicide layer formed on the gate electrode and the impurity junction region.
2. The semiconductor device according to claim 1 , wherein the first and the second silicide layers comprise a metal selected from the group consisting of titanium, cobalt, nickel, and tungsten.