Imprint-free coding for ferroelectric nonvolatile counters
View Patent ↗An encoder utilizes a coding method for use with ferroelectric or other nonvolatile counters which are subject to imprint ensures that all of the bits in the code are frequently switched and not left in a fixed data state. The general coding equation for this method is such that: for an even integer n, it is represented by the conventional binary code of n/2; for an odd integer n, it is represented by the conventional binary code of the one's compliment of (n−1)/2. With this method, every bit switches to its compliment when counting from an even number to an odd number so that imprint is substantially reduced.
1. An encoder for use in a nonvolatile counter comprising:
a logic gate having a first input for receiving an up/down signal, a second input for receiving a most-significant bit signal, and an output;
a plus-one block having an input for receiving an inverted input signal and an output; and
a two-to-one multiplexer having a first input for receiving the inverted input signal, a second input coupled to the output of the plus-one block, a control input coupled to the output of the logic gate, and an output for providing an encoded signal.
2. The encoder of claim 1 in which the first input is set to a logic one for counting up.
3. The encoder of claim 1 in which the first input is set to a logic zero for counting down.
4. The encoder of claim 1 in which the logic gate comprises a XNOR gate.
5. The encoder of claim 1 in which the plus-one block comprises a combinatorial logic circuit.
6. The encoder of claim 1 in which the encoded signal is equal to the inverted input signal if the control signal is a logic zero.
7. The encoder of claim 1 in which the encoded signal is equal to the inverted input signal plus one if the control signal is a logic one.
8. The encoder of claim 1 in which the nonvolatile counter comprises a ferroelectric nonvolatile counter.
9. The encoder of claim 1 in which the nonvolatile counter comprises an m-bit nonvolatile counter.
10. The encoder of claim 9 in which m is equal to 4.
11. The encoder of claim 9 in which m is equal to 5.
12. The encoder of claim 9 in which m is equal to 40.
13. A data encoding method for counting up from input number data n=d m d m-1 d m-2 . . . d 1 d 0 comprising:
adding a logic one to inverted input number data to provide intermediate number data;
multiplexing the inverted input number data and the intermediate number data to provide output number data; such that:
if n is even, then the output number data comprises n+1= d m d d m-1 d m-2 . . . d 1 d 0 ; and
if n is odd, then the output number data comprises n+1= d m d m-1 d m-2 . . . d 1 d 0 +1.
14. The data encoding method of claim 13 further comprising keeping an output count at a maximal number when counting up from the maximal number instead of rolling the output count over to zero.
15. The data encoding method of claim 14 in which the maximal number is equal to 1000 when m is equal to four.
16. A data encoding method for counting down from input number data n=d m d m-1 d m-2 . . . d 1 d 0 comprising:
adding a logic one to inverted in put number data to provide intermediate number data;
multiplexing the inverted input number data and the intermediate number data to provide output number data; such that:
if n is even, then the output number data comprises n−1= d m d m-2 . . . d 1 d 0 30 1 ; and
if n is odd, then the output number data comprises n−1= d m d m-2 . . . d 1 d 0 .
17. The data encoding method of claim 16 further comprising keeping an output count at zero when counting down from zero, instead of rolling the output count over to a maximal number.
18. The data encoding method of claim 16 in which the maximal number is equal to 1000 when m is equal to four.