Patent Assignment
Reel/Frame 029408/0437
Assignment of Assignor's Interest
Recorded: 2012-12-05
Received: 2012-12-05
Pages: 14
Assignor
RAMTRON INTERNATIONAL CORPORATION
Executed: 2012-12-03
Assignee
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT, SAN JOSE, CA, 95134-1709, UNITED STATES
Covered Properties
(46)
Method for Fabricating a Damascene Self-Aligned Ferroelectric Random Access Memory (F-Ram) Having a Ferroelectric Capacitor Aligned with a Three Dimensional Transistor Structure
Application:
13/569,785 →
Method for Fabricating a Damascene Self-Aligned Ferroelectric Random Access Memory (F-Ram) Device Structure Employing Reduced Processing Steps
Application:
13/569,735 →
Method for Fabricating a Damascene Self-Aligned Ferroelectric Random Access Memory (F-Ram) with Simultaneous Formation of Sidewall Ferroelectric Capacitors
Application:
13/569,755 →
Dynamic Adjusting Rfid Demodulation Circuit
Application:
13/490,285 →
Shunt Regulator Circuit Having a Split Output
Application:
13/490,296 →
Dynamic Power Clamp for Rfid Power Control
Application:
13/490,254 →
Generation of Voltage Supply for Low Power Digital Circuit Operation
Application:
13/490,163 →
Power-On Sequencing for an Rfid Tag
Application:
13/490,115 →
Analog Delay Cells for the Power Supply of an Rfid Tag
Application:
13/490,267 →
Bandgap Ready Circuit
Application:
13/490,236 →
Enhanced Hydrogen Barrier Encapsulation Method for the Control of Hydrogen Induced Degradation of Ferroelectric Capacitors in an F-Ram Process
Application:
13/470,117 →
Stack Processor Using a Ferroelectric Random Access Memory (F-Ram) for Code Space and a Portion of the Stack Memory Space Having an Instruction Set Optimized to Minimize Processor Stack Accesses
Application:
13/467,874 →
Stack Processor Using a Ferroelectric Random Access Memory (F-Ram) for Both Code and Data Space
Application:
13/467,831 →
Stack Processor Using a Ferroelectric Random Access Memory (F-Ram) for Code Space and a Portion of the Stack Memory Space
Application:
13/467,849 →
Stack Processor Using a Ferroelectric Random Access Memory (F-Ram) Having an Instruction Set Optimized to Minimize Memory Fetch Operations
Application:
13/467,816 →
Authenticating Ferroelectric Random Access Memory (F-Ram) Device and Method
Application:
13/355,145 →
Fast Block Write Using an Indirect Memory Pointer
Application:
12/833,836 →
Low Power, Low Pin Count Interface for an Rfid Transponder
Application:
12/833,817 →
Interrupt Generation and Acknowledgment for Rfid
Application:
12/833,861 →
Rfid Access Method Using an Indirect Memory Pointer
Application:
12/833,845 →
Method for Mitigating Imprint in a Ferroelectric Memory
Application:
12/415,918 →
Fast Power-on Detect Circuit with Accurate Trip-Points
Application:
11/929,326 →
2T/2C Ferroelectric Random Access Memory with Complementary Bit-Line Loads
Application:
11/875,922 →
Imprint-Free Coding for Ferroelectric Nonvolatile Counters
Application:
11/611,053 →
Circuit for Generating a Centered Reference Voltage for a 1T/1C Ferroelectric Memory
Application:
11/426,165 →
Counting Scheme with Automatic Point-of-Reference Generation
Application:
11/082,526 →
Non-Volatile Counter
Application:
11/021,394 →
Circuit for Generating a Centered Reference Voltage for a 1T/1C Ferroelectric Memory
Application:
10/984,065 →
Imprint-Free Coding for Ferroelectric Nonvolatile Counters
Application:
10/719,108 →
Ferroelectric Non-Volatile Logic Elements
Application:
10/613,427 →
Bit-Line Shielding Method for Ferroelectric Memories
Application:
10/404,941 →
Column Decoder Configuration for a 1T/1C Memory
Application:
10/389,276 →
Ferroelectric Random Access Memory Configurable Output Driver Circuit
Application:
10/233,276 →
Method for Producing Crystallographically Textured Electrodes for Textured Pzt Capacitors
Application:
10/190,351 →
Method for Producing Crystallographically Textured Electrodes for Textured Pzt Capacitors
Application:
10/190,350 →
Ferroelectric Memory with Bit-Plate Parallel Architecture and Operating Method Thereof
Application:
10/114,535 →
Ferroelectric Non-Volatile Logic Elements
Application:
10/076,058 →
Self Referencing 1T/1C Ferroelectric Random Access Memory
Application:
10/022,119 →
Ferroelectric Random Access Memory Configurable Output Driver Circuit
Application:
09/950,560 →
Capacitively Coupled Ferroelectric Random Access Memory Cell and a Method for Manufacturing the Same
Application:
09/873,772 →
Two Stage Low Voltage Ferroelectric Boost Circuit
Application:
09/864,851 →
Cmos Boosting Circuit Utilizing Ferroelectric Capacitors
Application:
09/864,858 →
Method for Manufacturing a Ferroelectric Memory Cell Including Co-Annealing
Application:
09/816,425 →
Structure for Masking Integrated Capacitors of Particular Utility for Ferroelectric Memory Integrated Circuits
Application:
09/797,394 →
Hydrogen Barrier Encapsulation Techniques for the Control of Hydrogen Induced Degradation of Ferroelectric Capacitors in Conjunction with Multilevel Metal Processing for Non-Volatile Integrated Circuit Memory Devices
Application:
09/783,496 →
Sense Amplifier Configuration for a 1T/1C Ferroelectric Memory
Application:
09/764,223 →