IP Library Granted Patent US 8,665,007
Granted Patent B2
US 8,665,007 · App. 13/490,254 · Granted Mar 4, 2014

Dynamic power clamp for RFID power control

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Quick Facts
Patent No.
US 8,665,007
App. No.
13/490,254
Granted
Mar 4, 2014
Kind
B2
Abstract

A clamp circuit for an RFID tag includes a power supply node, a dynamic clamp coupled between the power supply node and ground, and an active clamp coupled between the power supply and ground, having a shunt combined effect for providing a clamped power supply node VDDR voltage. The dynamic clamp includes a capacitor divider circuit, a resistor coupled to the capacitor divider circuit, and an N-channel transistor coupled to the capacitor divider circuit. The active clamp includes a differential amplifier having a first input coupled to a resistor divider, a second input for receiving a reference voltage, and an output coupled to a P-channel transistor for the clamped VDDR voltage.

Claims (13)

1. A clamp circuit for an RFID tag comprising:

a power supply node;

a dynamic clamp coupled between the power supply node and ground; and

an active clamp coupled between the power supply node and ground, wherein the combined action of the dynamic and active clamps moderate the behavior of the power supply node to fast rising RF inputs,

wherein the active clamp comprises a differential amplifier having a first input coupled to a resistor divider, a second input for receiving a reference voltage, and is coupled to a transistor for providing a clamped voltage (VDDR) from the power supply node.

2. The clamp circuit of claim 1 wherein the dynamic clamp comprises a capacitor divider circuit.

3. The clamp circuit of claim 2 wherein the dynamic clamp comprises a resistor coupled to the capacitor divider circuit.

4. The clamp circuit of claim 2 wherein the dynamic clamp comprises a transistor coupled to the capacitor divider circuit.

5. The clamp circuit of claim 4 wherein the transistor within the dynamic clamp comprises an N-channel transistor.

6. The clamp circuit of claim 1 wherein the differential amplifier comprises an operational amplifier.

7. The clamp circuit of claim 1 wherein the differential amplifier comprises a comparator.

8. The clamp circuit of claim 1 wherein the transistor comprises a P-channel transistor.

9. The clamp circuit of claim 8 wherein the clamped VDDR voltage is provided at a source of the P-channel transistor.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2012
From: RAMTRON INTERNATIONAL CORPORATION
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 029408/0437 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2012
From: OCHOA, AGUSTIN; TANG, HOWARD
To: RAMTRON INTERNATIONAL CORPORATION
Reel/Frame 028335/0314 →