Non-volatile counter
View Patent ↗A non-volatile counter circuit includes a state machine having a first input for receiving one or more control signals, a second input for receiving a current count value, a third input for receiving historical information, and an output for providing a next count value and an up/down control signal, and a non-volatile counter having an input coupled to the output of the state machine, and an output for providing a non-volatile count value. The non-volatile counter can be implemented onto a single integrated circuit using ferroelectric memory technology. The non-volatile counter circuit includes a first power supply node and a second power supply node for receiving power for operating the non-volatile-counter circuit through a first power supply or a second power supply, or both. The first and second power supplies can be low energy power supplies such as that provided by a sensor, or can be conventional power supplies. Either of the first and second power supplies can be internally boosted using an internal voltage doubler or other boosting circuitry.
1. A non-volatile counter circuit comprising:
a state machine having a first input for receiving one or more control signals, a second input for receiving a current count value, a third input for receiving historical information, and an output; and
a non-volatile counter having an input coupled to the output of the state machine, and an output,
wherein the state machine provides an up/down control signal to the non-volatile counter.
2. The non-volatile counter circuit of claim 1 in which the state machine comprises an output for providing a next count value.
3. The non-volatile counter circuit of claim 1 in which the non-volatile counter comprises an output for providing a count value.
4. The non-volatile counter circuit of claim 1 further comprising an energy-storing ferroelectric capacitor.
5. The non-volatile counter circuit of claim 1 in which the one or more control signals comprises a user input signal.
6. The non-volatile counter circuit of claim 1 in which the non-volatile counter comprises a ferroelectric non-volatile counter.
7. The non-volatile counter circuit of claim 1 in which the state machine and non-volatile counter are integrated onto a single integrated circuit.
8. A non-volatile counter circuit comprising:
a state machine having a first input for recieving one or more control signal, a second input for recieving a current count value a third input for recieving historic information, and an output,
a non-volatile counter having an input coupled to the output of the state machine, and an output; and a first power supply, second power supply and circuitry for selecting said first or second power supply for powering said non-volatile counter circuit.
9. The non-volatile counter circuit of claim 8 in which the first power supply comprises a low-power source of supply voltage.
10. The non-volatile counter circuit of claim 8 in which the second power supply comprises a conventional VCC source of supply voltage.
11. The non-volatile counter circuit of claim 8 further comprising means for independently boosting the voltages on the first and second power supply nodes.
12. A non-volatile counter integrated circuit comprising:
a first power supply node;
a second power supply node;
a non-volatile counter having a plurality of inputs for receiving control signals and count information; and
circuitry for selecting either the first power supply node or the second power supply node for powering the integrated circuit.
13. The integrated circuit of claim 12 further comprising a state machine coupled to the non-volatile counter.
14. The integrated circuit of claim 13 in which the state machine receives historical count information.
15. The integrated circuit of claim 12 in which the non-volatile counter comprises a ferroelectric non-volatile counter.
16. The integrated circuit of claim 12 in which the first power supply node is coupled to a low-voltage power source.
17. The integrated circuit of claim 12 in which the second power supply node is coupled to a conventional VCC power source.
18. The integrated circuit of claim 12 further comprising means for boosting the voltage present on the selected the first and second power supply nodes.
19. The integrated circuit of claim 12 further comprising means for independently boosting the voltage present on the selected the first and second power supply nodes.