IP Library Granted Patent US 8,729,960
Granted Patent B2
US 8,729,960 · App. 13/490,285 · Granted May 20, 2014

Dynamic adjusting RFID demodulation circuit

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,729,960
App. No.
13/490,285
Granted
May 20, 2014
Kind
B2
Abstract

A dynamic adjusting RFID demodulator circuit includes an envelope detector having an input for receiving a modulated RF signal, a fixed reference generator coupled to the input of an RC filter, an RF level dependent signal path adding to the fixed reference level at higher RF energy levels, a comparator having a first input coupled to an output of the envelope detector, a second input coupled to an output of the RC filter, and an output for providing a data output signal.

Claims (29)

1. A method of operating a dynamic adjusting RFID demodulator circuit comprising:

providing an envelope detector and an RC filter coupled to the envelope detector;

increasing a threshold of the RFID demodulator circuit in response to the power of an input modulated RF signal; and

comparing an output of the envelope detector to an output of the RC filter to provide a data output signal.

2. A dynamic adjusting RFID demodulator circuit comprising:

an envelope detector and an RC filter coupled to the envelope detector

a comparator having a first input coupled to an output of the envelope detector, a second input coupled to an output of the RC filter and an output for providing a data output signal,

wherein the comparator has a threshold corresponding to the power of an input modulated RF signal.

3. A dynamic adjusting RFID demodulator circuit comprising:

an envelope detector having an input for receiving a modulated RF signal;

a fixed reference coupled to the input of an RC filter; and

a comparator having a first input coupled to an output of the envelope detector, a second input coupled to an output of the RC filter, and an output for providing a data output signal.

4. The demodulator circuit of claim 3 wherein the envelope detector comprises an input diode.

5. The demodulator circuit of claim 3 wherein the envelope detector comprises a parallel resistor and capacitor circuit.

6. The demodulator circuit of claim 3 wherein the envelope detector comprises an output diode.

7. The demodulator circuit of claim 3 wherein the envelope detector comprises an output resistor.

8. The demodulator circuit of claim 3 wherein the fixed reference comprises a current source.

9. The demodulator circuit of claim 8 wherein the current source comprises a bandgap derived current source.

10. The demodulator circuit of claim 3 wherein the fixed reference comprises a diode-connected transistor.

11. The demodulator circuit of claim 10 wherein the diode-connected transistor comprises an N-channel transistor.

12. The demodulator circuit of claim 3 wherein the first input of the comparator comprises a positive input and the second input comprises a negative input.

13. The method of claim 1 wherein providing an envelope detector and an RC filter coupled to the envelope detector comprises providing an envelope detector including an output diode and an output resistor through which the RC filter is coupled to the envelope detector.

14. The method of claim 1 further comprising providing a fixed reference coupled to the input of an RC filter.

15. The method of claim 1 wherein increasing the threshold of the RFID demodulator circuit comprises injecting current into the output of the RC filter at the second input to the comparator at higher power levels.

16. The demodulator circuit of claim 2 further comprising a fixed reference coupled to the input of an RC filter.

17. The demodulator circuit of claim 16 wherein the fixed reference comprises a current source coupled to an input of an RC filter.

18. The demodulator circuit of claim 17 wherein the fixed reference further comprises a diode-connected transistor.

19. The demodulator circuit of claim 2 wherein the envelope detector comprises an output diode.

20. The demodulator circuit of claim 2 wherein the envelope detector comprises an output resistor.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2012
From: RAMTRON INTERNATIONAL CORPORATION
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 029408/0437 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2012
From: OCHOA, AGUSTIN; PISHDAD, BARDIA
To: RAMTRON INTERNATIONAL CORPORATION
Reel/Frame 028336/0655 →