IP Library Granted Patent US 7,273,803
Granted Patent B2
US 7,273,803 · App. 10/724,938 · Granted Sep 25, 2007

Ball limiting metallurgy, interconnection structure including the same, and method of forming an interconnection structure

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Quick Facts
Patent No.
US 7,273,803
App. No.
10/724,938
Granted
Sep 25, 2007
Kind
B2
Abstract

A ball-limiting metallurgy includes a substrate, a barrier layer formed over the substrate, an adhesion layer formed over the barrier layer, a first solderable layer formed over the adhesion layer, a diffusion barrier layer formed over the adhesion layer, and a second solderable layer formed over the diffusion barrier layer.

Claims (33)

1. A method for forming an interconnection structure for flip-chip attachment of microelectronic device clips to packages, comprising:

forming an adhesion layer over a substrate;

forming a seed layer over the adhesion layer,

forming a resist layer over the seed layer, the resist layer having an opening that exposes the seed layer;

forming a first solderable layer over the seed layer through the opening in the resist layer, wherein the first solderable layer comprises Cu;

forming a diffusion barrier layer over the first solderable layer through the opening in the resist layer, wherein the diffusion barrier layer comprises CoWP;

forming a second solderable layer over the diffusion barrier layer through the opening in the resist layer, wherein the second solderable layer comprises a layer of Ni having a thickness less than about 4 microns;

removing the resist layer;

removing portions of the seed layer and the adhesion layer that extend beyond the first solderable layer, the diffusion barrier layer and the second solderable layer; and

forming at least one solder ball over the second solderable layer.

2. The method of claim 1 , further comprising forming a polyimide layer around the adhesion layer, the seed layer, the first solderable layer, the diffusion barrier layer and the second solderable layer.

3. The method of claim 1 . wherein the adhesion layer is formed by sputtering.

4. The method of claim 1 , wherein the seed layer is formed by sputtering.

5. The method of claim 1 , wherein the first solderable layer is formed by electroplating.

6. The method of claim 1 , wherein the diffusion barrier layer is formed by electroless deposition.

7. The method of claim 1 . wherein, the second solderable layer is formed by electroplating.

8. The method of claim 1 , wherein the solder ball comprises a Led-free solder ball formed by electroplating, solder screening, exchange plating, or molten solder injection deposition.

9. A method for forming an interconnection structure for flip-chip attachment of microelectronic device chips to packages, comprising:

forming an adhesion layer over a substrate;

forming a seed layer over the adhesion layer,

forming a first solderable layer over the seed layer, wherein the first solderable layer comprises Cu;

forming a diffusion barrier layer over the first solderable layer, wherein the diffusion barrier layer comprises CoWP;

forming a second solderable layer over the diffusion barrier layer, wherein the second solderable layer comprises a layer of Ni having a thickness less than about 4 microns; and

forming at least one solder ball over the second solderable layer.

10. The method of claim 9 , wherein the step of forming the first solderable layer comprises:

forming a resist layer over the seed layer, the resist layer having an opening that exposes the seed layer; and

electroplating the first solderable layer over the seed layer through the opening in the resist layer.

11. The method of claim 10 , wherein the step of forming the diffusion barrier layer comprises electroless deposition of the diffusion barrier layer over the first solderable layer through the opening in the resist layer.

12. The method of claim 11 , wherein the step of forming the second solderable layer comprises electroplating the second solderable layer over the diffusion barrier layer through the opening in the resist layer.

13. The method of claim 11 , further comprising

removing the resist layer after the first solderable layer, the diffusion barrier layer and the second solderable layer are formed; and

removing portions of the barrier layer and the adhesion layer that extend beyond the first solderable layer, the diffusion barrier layer and the second solderable layer after the resist layer is removed.

14. The method of claim 9 , further comprising forming a polyimide layer around the barrier layer, the adhesion layer, the first solderable layer, the diffusion barrier layer and the second solderable layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 13, 2012
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ULTRATECH, INC.
Reel/Frame 028959/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2004
From: CHENG, YU-TING; CHIRAS, STEFANIE RUTH; HENDERSON, DONALD W.; KANG, SUNG-KWON; KILPATRICK, STEPHEN JAMES; NYE, HENRY A., III; SAMBUCETTI,, CARLOS J.; SHIH, DA-YUAN
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 014670/0611 →