IP Library Granted Patent US 6,974,747
Granted Patent B2
US 6,974,747 · App. 10/740,089 · Granted Dec 13, 2005

Method of manufacturing semiconductor device

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Quick Facts
Patent No.
US 6,974,747
App. No.
10/740,089
Granted
Dec 13, 2005
Kind
B2
Abstract

The present invention relates to a method of manufacturing a semiconductor device. After an undoped amorphous silicon layer is formed, it is crystallized by means of a spike rapid thermal process so that the grain growth of a small size is facilitated. Therefore, while the grain size is formed uniformly and small, a grain cross-section of the small size, as a columnar structure, induces crystals grown in a direction perpendicular to the interface. It is therefore possible to reduce the surface roughness and accomplish an electrically uniform characteristic over the entire area.

Claims (22)

1. A method of manufacturing a semiconductor device, comprising the steps of:

forming an amorphous silicon layer on a semiconductor substrate on which various components for forming a semiconductor device are formed; and

previously crystallizing the amorphous silicon layer by means of a spike rapid thermal annealing process, to form a crystallized amorphous polysilicon layer of which grain size is small and uniform,

wherein the spike rapid thermal annealing process is performed in an instant heating mode under a N 2 gas atmosphere at a step-up speed of 100° C./s to 300° C./s.

2. The method as claimed in claim 1 , wherein the amorphous silicon layer is an undoped amorphous polysilicon layer.

3. The method as claimed in claim 1 , wherein the amorphous silicon layer is formed at a temperature in the range of 300° C. to 600° C.

4. The method as claimed in claim 1 , wherein the spike rapid thermal process is performed at a temperature of 900° C. to 1050° C. and the annealing process of the spike rapid thermal process is controlled so that the grain size formed in a columnar shape becomes smaller than 600 Å.

5. A method of manufacturing a semiconductor device, comprising the steps of:

forming a tunnel oxide film on a semiconductor substrate;

forming an amorphous silicon layer on the tunnel oxide film;

previously crystallizing the amorphous silicon layer by means of a spike rapid thermal annealing process, to form a crystallized amorphous polysilicon layer of which grain size is small and uniform;

forming a pad nitride film on the crystallized amorphous polysilicon layer;

removing the pad nitride film, the crystallized amorphous polysilicon layer and the tunnel oxide film on an isolation region;

forming a trench in the semiconductor substrate of the isolation region;

forming thermal oxide films at sidewalls and bottoms of the trench by means of a sidewall oxidization process;

burying the trench with an insulating material to form a device isolation film; and

forming a polysilicon layer on the entire surface of the structure and then removing a portion of the polysilicon layer on the device isolation film to form a floating gate consisting of the crystallized amorphous polysilicon layer and the polysilicon layer,

wherein the spike rapid thermal annealing process is performed in an instant heating mode under a N 2 gas atmosphere at a step-up speed of 100° C./s to 300° C./s.

6. The method as claimed in claim 5 , wherein the amorphous silicon layer is an undoped amorphous polysilicon layer.

7. The method as claimed in claim 5 , wherein the amorphous silicon layer is formed at a temperature in the range of 300° C. to 600° C.

8. The method as claimed in claim 5 , wherein the spike rapid thermal process is performed at a temperature of 900° C. to 1050° C. and the annealing process of the spike rapid thermal process is controlled so that the grain size formed in a columnar shape becomes smaller than 600 Å.

9. The method as claimed in claim 5 , wherein the sidewall oxidization process is performed at a temperature where a second recrystallization that a grain of the crystallized amorphous polysilicon layer is excessively grown can be prevented.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2012
From: STMICROELECTRONICS S.R.L.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 029186/0761 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2011
From: NUMONYX B.V.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 027217/0837 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2011
From: HYNIX SEMICONDUCTOR INC.
To: NUMONYX B.V.
Reel/Frame 027217/0862 →