IP Library Granted Patent US 7,015,679
Granted Patent B2
US 7,015,679 · App. 10/741,055 · Granted Mar 21, 2006

Circuit and method for supplying an electrical a.c. load

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,015,679
App. No.
10/741,055
Granted
Mar 21, 2006
Kind
B2
Abstract

A method and circuit for supplying a variable voltage to an electrical a.c. load (R, L), comprising: a control signal input for receiving a switching control signal to control load output voltage; first and second circuit output terminals (ACL 1 , ACL 2 ) for connection to the load; first switch means (S 1 ) having an input coupled to the control signal input and having an output coupled between one (ACL 1 ) of the circuit output terminals (ACL 1 ) and a first a.c. line terminal (AC 1 ); second switch means (S 2 ) having an input coupled to the first switch means and having an output coupled between the first and second circuit output terminals (ACL 1 , ACL 2 ) and coupled to a second a.c. line terminal (AC 2 ); and providing a switching control signal to the control signal input to switch the first and second switch means complementarily. The switch means may each comprise a power transistor (Q 1 ; Q 2 ) and a bridge rectifier (B 1 ; B 2 ).

Claims (29)

1. A circuit for supplying an electrical a.c. load with a voltage that may be varied, the circuit comprising:

a control signal input for receiving a switching control signal to control load output voltage;

first and second circuit output terminals for connection across the load;

first switch means having an input coupled to the control signal input and having an output coupled between one of the first and second circuit output terminals and a first a.c. line terminal; and

second switch means having an input coupled to the first switch means and having an output coupled between the first and second circuit output terminals and coupled to a second a.c.line terminal,

the first and second switch means being arranged to be switched by the complementarily.

2. The circuit of claim 1 wherein at least one of the first and second switch means comprises:

transistor means coupled to the switch means and having a control electrode coupled to the switch means input and having other electrodes; and

rectifier bridge means having first terminals coupled to the other electrodes of the transistor means, and having second terminals coupled to the output.

3. The circuit of claim 1 further comprising flip-flop means coupled between the first switch means and the second switch means.

4. The circuit of claim 3 wherein the flip-flop means comprises transistor means, resistor means and capacitor means arranged to provide closed loop operation.

5. The circuit of claim 4 wherein a time constant of the resistor means and the capacitor means is arranged to produce bistable flip-flop operation at a desired operation frequency.

6. The circuit of claim 1 further comprising filter means coupled between the first switch means and the second switch means.

7. The circuit of claim 1 wherein the control signal input is arranged to receive a pulse width modulated switching control signal.

8. An integrated circuit comprising substantially the circuit of claim 1 .

9. A method for supplying a variable voltage to an electrical a.c. load, the method comprising:

providing a control signal input for receiving a switching control signal to control load output voltage;

providing first and second circuit output terminals for connection across the load;

providing first switch means having an input coupled to the control signal input and having an output coupled between one of the first and second circuit output terminals and a first a.c. line terminal;

providing second switch means having an input coupled to the first switch means and having an output coupled between the first and second circuit output terminals and coupled to a second a.c. line terminal; and

providing a switching control signal to the control signal input to switch the first and second switch means complementarily.

10. The method of claim 9 wherein at least one of the first and second switch means comprises:

transistor means coupled to the switch means and having a control electrode coupled to the switch means input and having other electrodes; and

rectifier bridge means having first terminals coupled to the other electrodes of the transistor means, and having second terminals coupled to the output.

11. The method of claim 9 further comprising providing flip-flop means coupled between the first switch means and the second switch means.

12. The method of claim 11 wherein the flip-flop means comprises transistor means, resistor means and capacitor means arranged to provide closed loop operation.

13. The method of claim 12 wherein a time constant of the resistor means and the capacitor means is arranged to produce bistable flip-flop operation at a desired operation frequency.

14. The method of claim 9 further comprising providing filter means coupled between the first switch means and the second switch means.

15. The method of claim 9 wherein the control signal is a pulse width modulated signal.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →