IP Library Granted Patent US 6,952,134
Granted Patent B2
US 6,952,134 · App. 10/742,942 · Granted Oct 4, 2005

Protection circuit for extending headroom with off-chip inductors

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Quick Facts
Patent No.
US 6,952,134
App. No.
10/742,942
Granted
Oct 4, 2005
Kind
B2
Abstract

A protection circuit for extending the dynamic range of an amplifier circuit is described. Off-chip impedances, such as inductors, cause the output of the circuit to swing above and below the bias voltage. A protection circuit is included, either on-chip or off-chip, to protect the integrated circuit components if there is a fault condition in either of the off-chip impedances.

Claims (34)

1. An electronic circuit assembly, comprising;

an electronic circuit;

a first impedance;

a second impedance;

wherein said electronic circuit has a positive output connected to a bias voltage through said first impedance, and a negative output connected to said bias voltage through said second impedance: and

means for raising a DC voltage at said positive output and said negative output without substantially effecting AC performance of said electronic circuit;

wherein said electronic circuit is disposed on a common substrate, and said means for raising said DC voltage is disposed external to said common substrate.

2. The electronic circuit assembly of claim 1 , wherein said means for raising said DC voltage includes a first off-chip impedance and a second off-chip impedance.

3. The electronic circuit assembly of claim 2 , wherein said first off-chip impedance is a first off-chip inductor and said second off-chip impedance is a second off-chip inductor.

4. The electronic circuit assembly of claim 2 , wherein said first off-chip impedance is a first ferrite bead and said second off-chip impedance is a second ferrite bead.

5. The electronic circuit assembly of claim 1 , wherein said electronic circuit is an amplifier.

6. The electronic circuit assembly of claim 5 , wherein said amplifier is comprised of a plurality of amplifier circuit assemblies, each of said plurality of amplifier circuit assemblies having a positive amplifier output and a negative amplifier output, each said positive amplifier outputs being combined into said positive output and each said negative amplifier outputs being combined into said negative output.

7. A method of extending dynamic range of an output of an electronic circuit having a positive output and a negative output, wherein a first on-chip impedance is connected between said positive output and a bias voltage of said electronic circuit and a second on-chip impedance is connected between said negative output and said bias voltage, comprising the steps of:

(1) connecting a first off-chip impedance between said positive output and the bias voltage; and

(2) connecting a second off-chip impedance between said negative output and said bias voltage, said bias voltage raising a DC voltage level at said positive and negative outputs through said corresponding first and second off-chip impedances.

8. The method of claim 7 , further comprising the steps of:

(3) connecting a common resistor between said bias voltage of said electronic circuit and a resistor port, wherein said resistor port is further connected to said first on-chip impedance and said second on-chip impedance; and

(4) connecting a common capacitor between said resistor port and a ground.

9. The method of claim 8 , wherein said first on-chip impedance is a first reactive load and said second on-chip impedance is a second reactive load.

10. The method of claim 7 , wherein at least one of said first off-chip impedance and said second off-chip impedance is a ferrite bead.

11. An electronic circuit assembly, comprising:

a substrate;

an electronic circuit disposed on said substrate, and

an on-chip impedance disposed on said substrate, wherein

said electronic circuit has an output connected to a bias voltage through said on-chip impedance, and

said output further being connected to said bias voltage through an off-chip impedance that is disposed external to said substrate, wherein said off-chip impedance raises a DC voltage of said output.

12. The electronic circuit assembly of claim 11 , wherein said on-chip impedance is comprised of an inductor and a resistor.

13. The electronic circuit assembly of claim 11 , wherein said off-chip impedance is an off-chip inductor.

14. The electronic circuit assembly of claim 11 , wherein said off-chip impedance is a ferrite bead.

15. The electronic circuit assembly of claim 11 , further comprising a common point resistor, wherein said common point resistor has a first port and a second port, said first port being connected to said bias voltage, and said second port being connected through said on-chip impedance to said output of said electronic circuit.

16. The electronic circuit assembly of claim 11 , wherein said second port of said common point resistor is further connected through a common capacitor to a second potential, wherein said second potential is substantially equal to a ground at a desired operating frequency range.

17. The electronic circuit assembly of claim 11 , wherein said electronic circuit is used in a cable modem.

18. The electronic circuit assembly of claim 11 , wherein said electronic circuit is used in a set-top box.

19. The electronic circuit assembly of claim 11 , wherein said electronic circuit is used in a television tuner.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0097. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048555/0510 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0097 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →