IP Library Granted Patent US 7,179,735
Granted Patent B2
US 7,179,735 · App. 10/743,578 · Granted Feb 20, 2007

Method of manufacturing semiconductor device

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Quick Facts
Patent No.
US 7,179,735
App. No.
10/743,578
Granted
Feb 20, 2007
Kind
B2
Abstract

Provided is a method of manufacturing a semiconductor device. According to the present invention, it is possible that an interlayer insulating film is planarized by forming the interlayer insulating film using multiple simultaneous deposition-and-etch processes without carrying out a subsequent planarization process. In addition, smoothness can be variably controlled by adjusting the deposition and etch rate.

Claims (17)

1. A method of manufacturing a semiconductor device, comprising the steps of:

providing a semiconductor substrate in which a gate electrode pattern is formed; and

forming an interlayer insulating film including a multi-layered oxide film by performing multiple simultaneous deposition-and-etch processes in order to bury the gate electrode pattern,

wherein a ratio of deposition rate to etch rate is varied for each of the multiple deposition-and-etch processes, and the last deposition-and-etch process has a lower ratio of deposition rate to etch rate relative to the preceding deposition-and-etch process.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein the multiple simultaneous deposition-and-etch process is carried out by performing a depositing and etching process for a HDP oxide film simultaneously.

3. The method of manufacturing a semiconductor device according to claim 1 , wherein the ratio of deposition rate to etch rate of the deposition-and-etch processes is in the range of 1 to 25.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein the etch process is carried out by using a plasma sputtering.

5. A method of manufacturing a semiconductor device, comprising the steps of:

providing a semiconductor substrate in which a gate electrode pattern is formed;

forming a first HDP oxide film over the entire structure by performing a first deposition-and-etch process simultaneously; and

forming a second HDP oxide film over the entire structure by performing a second deposition-and-etch process simultaneously,

wherein the first deposition-and-etch process has a higher ratio of deposition rate to etch rate relative to the second deposition-and-etch process.

6. The method of manufacturing a semiconductor device according to claim 5 , wherein the etch process is carried out by using a plasma sputtering.

7. The method of manufacturing a semiconductor device according to claim 5 , wherein the ratio of deposition rate to etch rate of the first deposition-and-etch process is in the range of 3 to 25.

8. The method of manufacturing a semiconductor device according to claim 5 , wherein the ratio of deposition rate to etch rate of the second deposition-and-etch process is in the range of 1 to 3.

9. The method of manufacturing a semiconductor device according to claim 1 , wherein the interlayer insulating film has a surface refractive index of 1.44 to 1.48.

10. The method of manufacturing a semiconductor device according to claim 5 , wherein the interlayer insulating film has a surface refractive index of 1.44 to 1.48.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2006
From: HYNIX SEMICONDUCTOR INC.
To: HYNIX SEMICONDUCTOR INC.; STMICROELECTRONICS S.R.L.
Reel/Frame 018207/0057 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2003
From: KIM, SANG DEOK
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 014843/0170 →