Method of fabricating semiconductor devices with replacement, coaxial gate structure
View Patent ↗A method is described for providing a nanostructure suspended above a substrate surface. The method includes providing a nanostructure encased in an oxide shell on a substrate and depositing a sacrificial material and a support material over the oxide encased nanostructure. Then, the sacrificial material is removed to expose the oxide encased nanostructure. Once the oxide encased nanostructure has been exposed, the oxide shell is removed from the oxide encased nanostructure such that the nanostructure is suspended above the substrate surface.
1. A method comprising:
providing a nanostructure covered on a substrate;
oxidizing a first portion of the nanostructure to define a sacrificial layer between the substrate and a second portion of the nanostructure;
forming a first support structure over the nanostructure;
forming a second support structure over the nanostructure; and
removing the sacrificial layer from the nanostructure such that second portion of the nanostructure is suspended a distance from a surface of the substrate between the first and second support structure.
2. The method of claim 1 , wherein oxidizing a first portion of the manostructure comprises:
placing a silicon nanowire structure on the substrate; and
oxidizing an outer layer of the nanowire structure to transform silicon to silicon-oxide.
3. The method of claim 1 , wherein, after removing the sacrificial layer, the second portion of the nanostructure is horizontally disposed a distance above a surface of the substrate, defined by a thickness of the sacrifical layer.
4. The method of claim 1 , wherein the first and second support structures comprise silicon oxynitride spacers.
5. The method of claim 1 , wherein the nanostructure comprises a nanowire structure.
6. The method of claim 5 , wherein the nanowire structure comprises a material selected from a group consisting of Si, Ge, In and Ga, or combinations thereof.
7. The method of claim 1 , wherein the nanostructure comprises a nanotube structure.
8. A method comprising:
providing a nanostructure suspended a distance from a substrate surface; and
depositing a gate material on the nanostructure.
9. The method of claim 8 , wherein depositing a gate material on the nanostructure comprises:
depositing a gate dielectric layer on the nanostructure such that the gate dielectric layer coaxially surrounds at least a portion of the nanostructure; and
depositing a gate electrode layer over the gate dielectric layer such that the gate electrode coaxially surrounds at least a portion of the gate dielectric layer.
10. The method of claim 9 , wherein a combined thickness of the gate dielectric layer and the gate electrode layer deposited on the nanostructure is in a range from about 3 to 8 nanometers.
11. The method of claim 8 , wherein the gate material includes a metal gate electrode material.
12. The method of claim 8 , wherein depositing a gate material on the nanostructure comprises:
depositing a gate electrode layer directly on the nanostructure such that the gate dielectric layer coaxially surrounds at least a portion of the nanostructure.
13. The method of claim 8 , wherein the nanostructure comprises a nanowire structure.
14. The method of claim 13 , wherein the nanowire structure comprises a material selected from a group consisting of Si, Ge, In and Ga, or combinations thereof.
15. The method of claim 13 , wherein providing the nanowire structure suspended above the substrate surface comprises:
providing the nanowire structure encased in an oxide shell on a substrate;
depositing a sacrificial gate electrode on the oxide encased nanowire structure;
removing the sacrificial gate electrode to expose the oxide encased nanowire structure; and
removing the oxide shell from the oxide encased nanowire structure to expose the nanowire structure, which is suspended above the substrate surface.
16. The method of claim 8 , wherein the nanostructure comprises a nanotube structure.