Semiconductor device and method for manufacturing the same
View Patent ↗A semiconductor device which is manufactured through a process of forming a second structure on a first structure, by using a photolithography technique, the semiconductor device includes a mark which is provided at a part of the first structure to be covered by the second structure and which is necessary for forming the second structure.
1. A semiconductor device comprising:
a semiconductor substrate having a major surface on which a circuit element is formed;
an electrode pad formed on the major surface and electrically connected with the circuit element;
a first insulating film formed over the major surface so as to expose a portion of the electrode pad;
a first wiring layer pattern extending from the electrode pad to a surface of the first insulating film;
a second insulating film having a first recess part exposing a portion of the first wiring layer pattern and a second recess part, the second insulating film being formed on the first insulating film and the first wiring pattern;
a second wiring layer pattern formed on the second insulating film including the first recess part and the second recess part;
a conductive member formed on the second wiring layer pattern;
a sealing resin covering the second insulating film, the second wiring layer pattern, and a side of the conductive member; and
an external terminal formed on the conductive member.
2. The semiconductor device as claimed in claim 1 , wherein the second wiring layer pattern is not connected with the first wiring layer pattern at the second recess part.
3. The semiconductor device as claimed in claim 1 , wherein the second recess part comprises a plurality of recess parts in the second insulating film.
4. The semiconductor device as claimed in claim 1 , wherein the second recess part is an alignment mark for forming the second wiring layer pattern.
5. The semiconductor device as claimed in claim 1 , wherein the second recess part is a mark for checking a positional gap in alignment when forming a mask pattern for forming the second wiring layer pattern.