IP Library Granted Patent US 7,051,454
Granted Patent B2
US 7,051,454 · App. 10/751,184 · Granted May 30, 2006

Method for etching a metal layer in a semiconductor device

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Quick Facts
Patent No.
US 7,051,454
App. No.
10/751,184
Granted
May 30, 2006
Kind
B2
Abstract

A method for etching a metal layer on which an oxide-based ARC layer is coated in a semiconductor device comprises the step of performing a dry cleaning process by using a Cl 2 /CHF 3 based gas, after dry cleaning the ARC layer by using the oxide-based gas. As a result, the etching rates of the center area and the edge area are substantially same.

Claims (18)

1. A method for etching a metal layer having an oxide-based antireflective coating (ARC) layer thereon comprising the steps of:

performing a first dry cleaning process in an etching chamber with an oxide-based gas;

performing a second dry cleaning process in the chamber with a gas mixture comprising Cl 2 and CHF 3 ; then etching the metal layer.

2. The method of claim 1 , wherein a flow rate of the Cl 2 ranges from about 100 seem to about 200 seem.

3. The method of claim 1 , wherein a flow rate of the CHF 3 ranges from about 5 seem to about 30 seem.

4. The method of claim 1 , wherein a pressure of the dry cleaning processes ranges from about 8 mTorr to about 50 mTorr.

5. The method of claim 1 , wherein a source power of the dry cleaning processes ranges from about 500 W to about 1200 W.

6. The method of claim 1 , wherein a bias power of the dry cleaning processes ranges from about 0 W to about 10 W.

7. The method of claim 1 , wherein the dry cleaning processes arc performed for about 5 seconds to about 30 seconds.

8. The method of claim 1 , wherein the oxide-based gas comprises oxygen.

9. The method of claim 1 , wherein the dry cleaning processes are performed sequentially in a single etching chamber.

10. The method of claim 1 , wherein the metal layer and ARC layer are on a wafer having a center area and an edge area, and the dry cleaning processes decrease a microloading effect in the edge area.

11. The method of claim 10 , wherein the metal layer is etched at a rate that is substantially the same in the center area and the edge area.

12. The method of claim 1 , wherein the second dry cleaning process eliminates polymers deposited in the chamber.

13. The method of claim 1 , wherein the second dry cleaning process eliminates aluminum- and silicon-containing byproducts.

14. The method of claim 1 , wherein the metal layer comprises an aluminum layer.

15. The method of claim 14 , wherein the metal layer further comprises a titanium nitride layer under the aluminum layer.

16. The method of claim 1 , wherein the ARC layer comprises a silicon oxide.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR PREVIOUSLY RECORDED ON REEL 017703 FRAME 0499. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNOR SHOULD BE "DONGBUANAM SEMICONDUCTOR INC.". Recorded Jun 28, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017854/0297 →
CHANGE OF NAME Recorded May 30, 2006
From: DONGANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017703/0499 →
CHANGE OF NAME Recorded Feb 10, 2006
From: ANAM SEMICONDUCTOR INC.
To: DONGBUANAM SEMICONDUCTOR INC.
Reel/Frame 017154/0430 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2003
From: OH, SANG HUN
To: ANAM SEMICONDUCTOR, INC.
Reel/Frame 014868/0027 →