IP Library Assignment 017854/0297
Patent Assignment
Reel/Frame 017854/0297

Corrective Assignment to Correct the Assignor Previously Recorded on Reel 017703 Frame 0499. Assignor(S) Hereby Confirms the Assignor Should Be "Dongbuanam Semiconductor Inc.".

Recorded: 2006-06-28 Received: 2006-06-28 Pages: 14
Assignor
DONGBUANAM SEMICONDUCTOR INC.
Executed: 2006-03-28
Assignee
DONGBU ELECTRONICS CO., LTD.
891-10 DAECHI-DONG, KANGNAM-KU, SEOUL, KRX, KOREA, REPUBLIC OF
Covered Properties (39)
Semiconductor devices and methods to form a contact in a semiconductor device
Application: 11/115,516 →
Methods for Forming a Field Effect Transistor
Application: 10/956,311 →
Methods for Forming a Device Isolating Barrier and Methods for Forming a Gate Electrode Using the Same
Application: 10/764,637 →
Methods of Manufacturing Mosfet Devices
Application: 10/765,027 →
Methods for Forming a Metal Line in a Semiconductor Manufacturing Process
Application: 10/764,905 →
Methods of manufacturing metal-insulator-metal capacitors of high capacitance in semiconductor devices
Application: 10/750,489 →
Inorganic Compound for Removing Polymers in Semiconductor Processes
Application: 10/750,248 →
Methods of Fabricating Silicon on Insulator Substrates for Use in Semiconductor Devices
Application: 10/750,251 →
Methods for Forming a Gate in a Semiconductor Device
Application: 10/750,245 →
Methods of Manufacturing Semiconductor Devices Having Capacitors
Application: 10/750,246 →
Method for Forming a Dual Damascene Structure in a Semiconductor Device
Application: 10/751,169 →
Method for Packaging a Multi-Chip Module of a Semiconductor Device
Application: 10/751,200 →
Ceramic Packaging Method Employing Flip-Chip Bonding
Application: 10/751,209 →
Method for Etching a Metal Layer in a Semiconductor Device
Application: 10/751,184 →
Method of Manufacturing Mosfet Having a Fine Gate Width with Improvement of Short Channel Effect
Application: 10/748,466 →
Semiconductor Package and Structure Thereof
Application: 10/751,183 →
Methods for Forming Shallow Trench Isolation Structures
Application: 10/748,468 →
Methods of Manufacturing Transistors Using Dummy Gate Patterns
Application: 10/748,025 →
Method for Packaging a Semiconductor Device
Application: 10/751,212 →
Semiconductor Transistors and Methods of Fabricating the Same
Application: 10/749,541 →
Plasma Ignition Method and Apparatus
Application: 10/749,635 →
Method for Packaging a Multi-Chip Module of a Semiconductor Device
Application: 10/751,198 →
Method for Packaging a Semiconductor Device
Application: 10/751,199 →
Method for Forming Metal Lines in a Semiconductor Device
Application: 10/749,485 →
Semiconductor Package with a Heat Spreader
Application: 10/751,175 →
Side Braze Packages
Application: 10/748,428 →
Methods for Manufacturing Semiconductor Devices
Application: 10/749,647 →
Methods for Manufacturing a Semiconductor Device
Application: 10/747,595 →
Methods of Forming Metal Lines in Semiconductor Devices
Application: 10/746,652 →
Methods of Manufacturing Semiconductor Memory Devices
Application: 10/746,802 →
Methods of Manufacturing Mosfets in Semiconductor Devices
Application: 10/745,855 →
Semiconductor Devices and Methods of Manufacturing the Same
Application: 10/722,825 →
Method of Forming a Contact in a Semiconductor Device Utilizing a Plasma Treatment
Application: 10/721,978 →
Method for Forming a Contact Using a Dual Damascene Process in Semiconductor Fabrication
Application: 10/712,740 →
Stacked hybrid metal line structures including aluminum-copper-alloy
Application: 10/712,945 →
Semiconductor Devices and Methods for Forming Semiconductor Devices
Application: 10/663,412 →
Rf Semiconductor Devices and Methods for Fabricating the Same
Application: 10/627,057 →
Cmos Image Sensor
Application: 10/442,898 →
CMOS image sensors
Application: 10/442,613 →