IP Library Granted Patent US 7,279,382
Granted Patent B2
US 7,279,382 · App. 10/750,246 · Granted Oct 9, 2007

Methods of manufacturing semiconductor devices having capacitors

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Quick Facts
Patent No.
US 7,279,382
App. No.
10/750,246
Granted
Oct 9, 2007
Kind
B2
Abstract

An example method of manufacturing a semiconductor device having a capacitor includes sequentially depositing a lower metal layer, an insulating layer and an upper metal layer on a semiconductor substrate, removing a first photoresist pattern by using O 2 /N 2 plasma, and removing polymer existing on the lower metal layer by using H 2 O/CF 4 plasma. According to one example, the capacitor may include a lower electrode film, the capacitor insulating film and the upper electrode film.

Claims (35)

1. A method of removing polymer generated in a semiconductor manufacturing process, which includes sequentially depositing a lower metal layer, an insulating layer and an upper layer on a semiconductor substrate; forming a photoresist pattern on the upper metal layer; and etching the upper metal layer and the insulating layer by using the photoresist pattern as a mask, the polymer being generated during the etching step, the method comprising:

(a) removing the photoresist pattern by using O 2 /N 2 plasma;

(b) removing the polymer existing on the lower metal layer by using H 2 O/CF 4 plasma; and

(c) using a plasma from a gas consisting essentially of O 2 , removing residues of the photoresist pattern remaining after (b).

2. A method as defined by claim 1 , wherein (a) is carried out for about 50 seconds.

3. A method as defined by claim 1 , wherein a flow rate of a CF 4 gas in (b) is in a range from 5% to 15% of that of a H 2 O gas.

4. A method as defined by claim 1 , wherein powers used in the (a), (b) and (c) are substantially same.

5. A method as defined by claim 1 , wherein a process time of (c) is in a range from 40% to 60% of that of (a).

6. A method as defined by claim 1 , wherein a process time of (b) is in a range from 30% to 50% of that of (a).

7. A method of manufacturing a semiconductor device having a capacitor, the method comprising:

(a) sequentially depositing a lower metal layer, an insulating layer and an upper metal layer on a semiconductor substrate;

(b) forming a first photoresist pattern on the upper metal layer;

(c) forming an upper electrode film and a capacitor insulating film by etching the upper metal layer and the insulating layer by using the first photoresist pattern as a mask;

(d) removing the first photoresist pattern by using O 2 /N 2 plasma;

(e) removing polymer existing on the lower metal layer by using H 2 O/CF 4 plasma, then removing remaining residues of the first photoresist pattern using a plasma from a gas consisting essentially of O 2 ;

(f) forming a second photoresist pattern for completely encapsulating the upper electrode film and the capacitor insulating film;

(g) forming a lower electrode film by etching the lower metal layer by using the second photoresist pattern as a mask; and

(h) removing the second photoresist pattern to provide the capacitor including the lower electrode film, the capacitor insulating film and the upper electrode film.

8. A method of removing polymer from a lower metal layer having an insulating layer and an upper metal layer thereon, the lower metal layer on a semiconductor substrate, the upper metal layer having a first photoresist pattern thereon, the method comprising steps of:

(a) removing the first photoresist pattern by ashing with a first plasma from a first gas mixture consisting essentially of O 2 and N 2 ;

(b) removing the polymer on the lower metal layer by ashing with a second plasma from a second gas mixture consisting essentially of H 2 O and CF 4 ; and

(c) removing remaining residues of the first photoresist pattern with a third plasma from a gas consisting essentially of O 2 .

9. A method as defined by claim 8 , wherein step (a) is carried out for about 50 seconds.

10. A method as defined by claim 8 , wherein step (b) comprises flowing CF 4 gas at a rate of from 5% to 15% of that of H 2 O gas.

11. A method as defined by claim 8 , wherein steps (a), (b) and (c) each use substantially the same power.

12. A method as defined by claim 8 , wherein a process time of step (c) is from 40% to 60% of that of step (a).

13. A method as defined by claim 8 , wherein a process time of step (b) is from 30% to 50% of that of step (a).

14. The method of claim 8 , further comprising, prior to step (a), steps of sequentially depositing the lower metal layer, the insulating layer and the upper metal layer on the semiconductor substrate; forming the first photoresist pattern on the upper metal layer; and forming an upper electrode by etching the upper metal layer using the first photoresist pattern as a mask.

15. The method of claim 14 , further comprising, after forming the upper electrode and prior to step (a), forming a capacitor insulating film by etching the insulating layer using the first photoresist pattern as a mask.

16. The method of claim 15 , further comprising, after step (b), steps of forming a second photoresist pattern completely encapsulating the upper electrode and the capacitor insulating film; forming a lower electrode by etching the lower metal layer using the second photoresist pattern as a mask; and removing the second photoresist pattern to provide a capacitor including the lower electrode film, the capacitor insulating film and the upper electrode film.

17. A method as defined by claim 1 , wherein the O 2 /N 2 plasma is formed from a gas mixture consisting essentially of O 2 and N 2 .

18. A method as defined by claim 17 , wherein removing the photoresist pattern is performed before removing the polymer existing on the lower metal layer.

19. A method as defined by claim 8 , wherein the O 2 /N 2 plasma is formed from a gas mixture consisting essentially of O 2 and N 2 .

20. A method as defined by claim 19 , wherein removing the photoresist pattern is performed before removing the polymer existing on the lower metal layer.

21. A method as defined by claim 8 , wherein removing the first photoresist pattern is performed before removing the polymer on the lower metal layer.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR PREVIOUSLY RECORDED ON REEL 017703 FRAME 0499. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNOR SHOULD BE "DONGBUANAM SEMICONDUCTOR INC.". Recorded Jun 28, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017854/0297 →
CHANGE OF NAME Recorded May 30, 2006
From: DONGANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017703/0499 →
MERGER Recorded May 31, 2005
From: DONGBU SEMICONDUCTOR INC.
To: DONGBUANAM SEMICONDUCTOR, INC.
Reel/Frame 016593/0667 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 26, 2004
From: JO, BO YEOUN
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 014925/0130 →