Method for packaging a semiconductor device
View Patent ↗A method for packaging a semiconductor device wherein a chip is interconnected with a substrate by performing a flip-chip bonding by using an Au bump formed on a bond pad of the chip. In the method, a wire-bonding process and a molding process using an epoxy molding compound are not required. Further, a process of attaching solder balls to the substrate is not required, which eliminates subsequent flux printing and deflux processes. Accordingly, a packaging process of the semiconductor device becomes simplified and therefore the cost of the semiconductor device is decreased.
1. A method for packaging a semiconductor device, comprising the steps of:
(a) forming an Au bump on a bond pad of a wafer,
(b) dicing the wafer into a chip; and
(c) attaching the Au bump of the chip to a copper pattern embedded in a substrate to form a flip-chip bond using a thermo-pressure process, wherein the Au bump is connected directly to the bond pad of the chip and connected to the substrate through an Ag layer and a Cu layer, and has a pillar shape.
2. The method of claim 1 , further comprising the step of
(d) encapsulating the flip-chip bond using a nonconductive epoxy after step (c).
3. The method of claim 2 , further comprising the step of
(e) sawing the substrate to singulate individual packages.
4. The method of claim 1 , wherein the thermo-pressure process comprises attaching the Au bump to a copper pattern in the substrate.
5. The method of claim 4 , further comprising forming a plating lead on an opposite side of the substrate from the chip.
6. The method of claim 5 , wherein forming the plating lead comprises plating an AgSn layer on the copper pattern.
7. The method of claim 1 , wherein the Ag layer directly contacts the Au bump.
8. The method of claim 1 , wherein the Cu layer directly contacts the substrate.
9. The method of claim 1 , wherein the substrate has a trench, and the Au bump of the chip is attached to the copper pattern in the trench.
10. The method of claim 1 , wherein the Ag layer contacts the Au bump and the Cu layer, and the Cu layer contacts the copper pattern.
11. A method for packaging a semiconductor device, comprising the steps of:
(a) forming a pillar-shaped Au bump directly on a bond pad of a wafer;
(b) dicing the wafer into a chip; and
(c) attaching the pillar-shaped Au bump of the chip to a copper pattern embedded in a substrate through a plurality of metal layers comprising an Ag layer and a Cu layer to form a flip-chip bond using a thermo-pressure process.
12. The method of claim 11 , further comprising the step of
(d) encapsulating the flip-chip bond using a nonconductive epoxy after step (c).
13. The method of claim 12 , further comprising the step of
(c) sawing the substrate to singulate individual packages.
14. The method of claim 11 , wherein the thermo-pressure process comprises attaching the Au bump to a copper pattern in the substrate.
15. The method of claim 14 , further comprising forming a plating lead on an opposite side of the substrate from the chip.
16. The method of claim 15 , wherein forming the plating lead comprises plating an AgSn layer on the copper pattern.
17. The method of claim 11 , wherein the Ag layer directly contacts the Au bump.
18. The method of claim 11 , wherein the Cu layer directly contacts the substrate.
19. The method of claim 11 , wherein the substrate has a trench, and the Au bump of the chip is attached to the copper pattern in the trench.
20. The method of claim 11 , wherein the Ag layer contacts the Au bump and the Cu layer, and the Cu layer contacts the copper pattern.