IP Library Granted Patent US 6,967,142
Granted Patent B2
US 6,967,142 · App. 10/722,825 · Granted Nov 22, 2005

Semiconductor devices and methods of manufacturing the same

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Quick Facts
Patent No.
US 6,967,142
App. No.
10/722,825
Granted
Nov 22, 2005
Kind
B2
Abstract

An example method for fabricating a semiconductor device includes forming a well, a source region, and a drain region in a substrate, forming a gate oxide film on the substrate and coating a polysilicon film on the gate oxide film. Further, the example method includes forming a trench isolation in the substrate by a dry etching process, forming a oxide film on the inside surface of the trench isolation, providing a dielectric material to fill in the trench isolation, planarizing the dielectric material to expose the top surface of the polysilicon film, and forming a gate by dry etching the polysilicon film.

Claims (11)

1. A method for fabricating a semiconductor device comprising:

forming a well, a source region, and a drain region in a substrate;

forming a gate oxide film on the substrate;

depositing a polysilicon film on the gate oxide film;

forming a trench isolation in the substrate by a dry etching process;

forming an oxide film on the inside surface of the trench isolation;

providing a dielectric material to fill in the trench isolation and planarizing the dielectric material to expose the top surface of the polysilicon film; and

forming a gate by dry etching the polysilicon film.

2. The method of claim 1 , wherein forming a gate by dry etching the polysilicon film includes a first etching process without a selective ratio to the dielectric material and a second etching process with a selective ratio to the dielectric material, so that the dielectric material in the trench isolation is not protruded from the gate oxide film.

3. The method of claim 1 , wherein in the trench isolation forming, the dry etching process is performed by using a photoresist pattern formed on the polysilicon film as a mask.

4. The method of claim 1 , wherein the planarizing of the dielectric material is performed by a CMP process.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR PREVIOUSLY RECORDED ON REEL 017703 FRAME 0499. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNOR SHOULD BE "DONGBUANAM SEMICONDUCTOR INC.". Recorded Jun 28, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017854/0297 →
CHANGE OF NAME Recorded May 30, 2006
From: DONGANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017703/0499 →
MERGER Recorded May 31, 2005
From: DONGBU SEMICONDUCTOR INC.
To: DONGBUANAM SEMICONDUCTOR, INC.
Reel/Frame 016593/0667 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2003
From: SOHN, HYUN JOON
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 014787/0629 →