Fabrication method of semiconductor integrated circuit device
View Patent ↗On the occasion of the aligning process to transfer a predetermined pattern to a semiconductor wafer by irradiating a photoresist on the semiconductor wafer with an aligning laser beam of the modified lighting via a photomask MK, the photomask MK allocating, to provide periodicity, the main apertures to transfer the predetermined pattern as the apertures formed by removing a part of the half-tone film on the mask substrate and the auxiliary apertures not resolved on the semiconductor wafer as the apertures formed by removing a part of the half-tone film is used to improve the resolution of the pattern.
1. A method for manufacturing a semiconductor IC device, comprising the steps of:
(a) transferring an integrated circuit pattern over a photomask to a wafer by irradiating a photoresist film over said wafer with an off-axis illumination of ultraviolet exposure light through an optical reduction projection system, said photomask comprising:
(i) a mask substrate transparent to the ultraviolet exposure light;
(ii) a halftone film over a major surface of the mask substrate;
(iii) a plurality of main apertures in the halftone film to transfer the integrated circuit pattern corresponding to a plurality of hole patterns having substantially a same size over the wafer; and
(iv) a plurality of auxiliary apertures in the halftone film not resolved over said wafer, wherein said main apertures and said auxiliary apertures are disposed so as to fill all periodical lattice points of a virtual rectangular lattice within a first integrated circuit pattern region over a major surface of the mask substrate.
2. A method for manufacturing a semiconductor IC device according to claim 1 , wherein the off-axis illumination is annular illumination.
3. A method for manufacturing a semiconductor IC device according to claim 1 , wherein the off-axis illumination is quadruple illumination.
4. A method for manufacturing a semiconductor IC device according to claim 1 , wherein the ultraviolet exposure light is light from a KrF excimer laser.
5. A method for manufacturing a semiconductor IC device according to claim 2 , wherein the ultraviolet exposure light is light from a KrF excimer laser.
6. A method for manufacturing a semiconductor IC device according to claim 3 , wherein the ultraviolet exposure light is light from a KrF excimer laser.
7. A method for manufacturing a semiconductor IC device according to claim 1 , wherein the ultraviolet exposure light is light from an ArF excimer laser.
8. A method for manufacturing a semiconductor IC device according to claim 2 , wherein the ultraviolet exposure light is light from an ArF excimer laser.
9. A method for manufacturing a semiconductor IC device according to claim 3 , wherein the ultraviolet exposure light is light from an ArF excimer laser.
10. A method for manufacturing a semiconductor IC device according to claim 1 , wherein the virtual rectangular lattice is a square lattice.
11. A method for manufacturing a semiconductor IC device according to claim 2 , wherein the virtual rectangular lattice is a square lattice.
12. A method for manufacturing a semiconductor IC device according to claim 3 , wherein the virtual rectangular lattice is a square lattice.
13. A method for manufacturing a semiconductor IC device according to claim 4 , wherein the virtual rectangular lattice is a square lattice.
14. A method for manufacturing a semiconductor IC device according to claim 5 , wherein the virtual rectangular lattice is a square lattice.
15. A method for manufacturing a semiconductor IC device according to claim 6 , wherein the virtual rectangular lattice is a square lattice.
16. A method for manufacturing a semiconductor IC device according to claim 7 , wherein the virtual rectangular lattice is a square lattice.
17. A method for manufacturing a semiconductor IC device according to claim 8 , wherein the virtual rectangular lattice is a square lattice.
18. A method for manufacturing a semiconductor IC device according to claim 9 , wherein the virtual rectangular lattice is a square lattice.