IP Library Granted Patent US 6,902,458
Granted Patent B2
US 6,902,458 · App. 10/755,890 · Granted Jun 7, 2005

Silicon-based dielectric tunneling emitter

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,902,458
App. No.
10/755,890
Granted
Jun 7, 2005
Kind
B2
Abstract

An emitter has an electron supply layer and a silicon-based dielectric layer formed on the electron supply layer. The silicon-based dielectric layer is preferably less than about 500 Angstroms. Optionally, an insulator layer is formed on the electron supply layer and has openings defined within which the silicon-based dielectric layer is formed. A cathode layer is formed on the silicon-based dielectric layer to provide a surface for energy emissions of electrons and/or photons. Preferably, the emitter is subjected to an annealing process thereby increasing the supply of electrons tunneled from the electron supply layer to the cathode layer.

Claims (38)

1. A method for creating an emitter on an electron supply, comprising the steps of:

forming a silicon-based dielectric emitter using semiconductor thin-film layers on the electron supply, at least one of the thin-film layers being a film characterized as a silicon-based dielectric tunneling layer with a thickness of less than 500 Angstroms;

applying a cathode layer on the silicon-based dielectric tunneling layer; and

annealing the emitter to increase the tunneling current of the emitter by creating nano-porous openings in the cathode layer.

2. An emitter created by the process of claim 1 .

3. The method of claim 1 wherein the step of applying the silicon-based dielectric layer further comprises the step of applying a silicon-based dielectric from the group consisting of SiC, SiN x , Si x N y , Si 3 N 4 , F y —SiO x , and C y —SiO x .

4. The method of claim 1 wherein the step of applying a cathode layer on the silicon-based dielectric layer, includes applying the cathode layer selected from the group consisting of platinum, gold, molybdenum, ruthenium, tantalum, iridium, other refractory metals and alloys thereof.

5. A method for creating an emitter on an electron supply, comprising the steps of:

forming a silicon-based dielectric emitter using semiconductor thin-film layers on the electron supply, at least one of the thin-film layers being a film characterized as a silicon-based dielectric tunneling layer with a thickness between about 250 Angstroms and about 5000 Angstroms;

applying a cathode layer on the silicon-based dielectric tunneling layer; and

annealing the emitter to increase the tunneling current of the emitter by creating nano-porous openings in the cathode layer.

6. A method for creating an emitter on an electron supply, comprising the steps of:

applying a silicon-based dielectric tunneling layer over an insulating layer disposed on the electron supply, the insulator layer defining an opening to the electron supply;

applying a conductive layer to adhere to the silicon-based dielectric tunneling layer;

applying a patterning layer on the conductive layer;

creating an opening in the patterning and conductive layer to the silicon based dielectric tunneling layer;

etching the patterning layer to remove it by lift-off from the conductive layer;

applying a cathode layer on the silicon-based dielectric tunneling layer; and

annealing the emitter to increase the tunneling current by creating nano-porous openings in the cathode layer.

7. An emitter created by the process of claim 6 .

8. The method of claim 6 wherein the applied silicon-based dielectric tunneling layer has a thickness less than about 500 Angstroms.

9. A method for creating an emitter on an electron supply surface, the method comprising the steps of:

creating an insulator layer on the electron supply surface;

defining an emission area within the insulator layer;

applying a silicon-based dielectric tunneling layer over the insulator layer and the opening;

applying an adhesion layer on the silicon-based dielectric tunneling layer;

applying a conduction layer on the adhesion layer;

applying a patterning layer on the conduction layer;

creating an opening to the conduction layer in the patterning layer;

etching the conduction layer in the opening to the adhesion layer;

etching the adhesion layer to the silicon-based dielectric tunneling layer;

etching the patterning layer by lift off;

applying a cathode layer over the portion of the silicon-based dielectric tunneling layer and a portion of the conduction layer;

etching the cathode layer; and

annealing the emitter to create nano-porous openings in the cathode layer.

10. An emitter created by the process of claim 9 .

11. The method of claim 9 wherein the applied silicon-based dielectric tunneling layer has a thickness less than 500 Angstroms.

12. The method of claim 9 wherein the applied silicon-based dielectric tunneling layer has a thickness in the range of about 250 to 5000 Angstroms.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 26, 2011
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.; HEWLETT-PACKARD COMPANY
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 026198/0139 →