IP Library › Granted Patent US 7,415,705
Granted Patent B2
US 7,415,705 · App. 10/757,171 · Granted Aug 19, 2008

Autonomic method and apparatus for hardware assist for patching code

Assignee: International Business Machines Corporation
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Quick Facts
Patent No.
US 7,415,705
App. No.
10/757,171
Granted
Aug 19, 2008
Kind
B2
Abstract

A method, apparatus and computer instructions for hardware assist for autonomically patching code. The present invention provides hardware microcode to a new type of metadata to selectively identify instructions to be patched for specific performance optimization functions. The present invention also provides a new flag in the machine status register (MSR) to enable or disable a performance monitoring application or process to perform code-patching functions. If the code patching function is enabled, the application or process may patch code at run time by associating the metadata with the selected instructions. The metadata includes pointers pointing to the patch code block code. The program code may be patched autonomically without modifying original code.

Claims (19)

1. A method of autonomically patching computer program code, comprising:

checking a flag in a machine status register to determine whether code patching functionality is to be enabled;

responsive to determining that code patching functionality is to be enabled, enabling the code patching functionality;

executing a computer program instruction, wherein the computer program instruction is located at a start of a block of code of an execution sequence of original code instructions;

determining whether metadata is associated with the computer program instruction, wherein the metadata identifies the computer program instruction as a computer program instruction having associated patch instructions, and indicates an address of the patch instructions;

responsive to determining that metadata is associated with the computer program instruction, redirecting execution to the patch instructions at the address indicated by the metadata;

executing the patch instructions;

returning to an instruction of the execution sequence of original code instructions in the computer program; and

storing a result of executing the execution sequence.

2. The method of claim 1 , wherein the patch instructions are created during execution of the computer program.

3. The method of claim 1 , wherein the patch instructions are created by:

copying instructions from the block of code to a new memory location;

modifying the order of the instructions of the block of code; and

populating the metadata with a pointer to the patch instructions.

4. The method of claim 1 , wherein the metadata is in a form of a memory word.

5. The method of claim 1 , wherein the metadata includes a pointer to the patch instructions for indicating the address of the patch instructions.

6. The method of claim 5 , wherein the pointer to the patch instructions includes a starting address of the patch instructions in an allocated memory location.

7. The method of claim 6 , wherein the starting address includes at least one of an absolute or offset address.

8. The method of claim 1 , wherein the patch instructions includes at least one of reorganized instructions, instrumented alternative instructions, and hooks to build an instruction trace.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2004
From: DEWITT, JIMMIE EARL JR.; LEVINE, FRANK ELIOT; RICHARDSON, CHRISTOPHER MICHAEL; URQUHART, ROBERT JOHN
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 014903/0907 →
Continuity (1)
Related Publication 20050155030A1 · Jul 14, 2005