Drive circuit for driving a current driven display unit
View Patent ↗A drive circuit includes an input node for receiving data and an output node. The drive circuit also includes a first MOS transistor of a first conductivity type and a second MOS transistor of the first conductivity type. The first MOS transistor has a source, a drain connected to the output node, and a gate connected to the input node. The second MOS transistor has a source, a drain connected to the source of the first MOS transistor, and a gate supplied with a predetermined potential level. The drive circuit also includes a resistance connected between the source of the second MOS transistor and a source node supplied with a source potential level.
1. A drive circuit comprising:
an input node for receiving data;
an output node;
a first MOS transistor of a first conductivity type, the first MOS transistor having a source, a drain connected to the output node, and a gate connected to the input node;
a second MOS transistor of the first conductivity type, the second MOS transistor having a source, a drain connected to the source of the first MOS transistor, and a gate supplied with a predetermined potential level; and
a resistor which comprises a third MOS transistor of the first conductivity type, the third MOS transistor having a source connected to a source node supplied with a source potential level, a drain connected to the source of the second MOS transistor and a gate connected to a ground node supplied with a ground potential level.
2. The drive circuit according to claim 1 , further including a fourth MOS transistor of a second conductivity type, the fourth MOS transistor having a source connected to the ground node, a drain connected to the output node, and a gate connected to the input node.
3. The drive circuit according to claim 1 , wherein the second MOS transistor supplies a constant current to the output node.
4. A drive circuit comprising:
an input node for receiving data;
an output node;
a first MOS transistor of a first conductivity type, the first MOS transistor having a source, a drain connected to the output node, and a gate connected to the input node;
a second MOS transistor of the first conductivity type, the second MOS transistor having a source, a drain connected to the source of the first MOS transistor, and a gate supplied with a predetermined potential level; and
a resistor which comprises a third MOS transistor of the first conductivity type, the third MOS transistor having a gate connected to a ground node supplied with a ground potential level, a drain connected to the source of the second MOS transistor and a source connected to a source node supplied with a source potential level.
5. The drive circuit according to claim 4 , further including a fourth MOS transistor of a second conductivity type, the fourth MOS transistor having a source connected to a source node supplied with a source potential, a drain connected to the output node, and a gate connected to the input node.
6. The drive circuit according to claim 4 , wherein the second MOS transistor supplies a constant current to the output node.
7. A drive circuit comprising:
a source node supplied with a source potential level;
a ground node supplied with a ground potential level;
a data input node for receiving data;
an output node to which a light-emitting device is connected;
a first MOS transistor of a first conductivity type, the first MOS transistor having a source, a drain connected to the output node, and a gate connected to the data input node;
a second MOS transistor of a second conductivity type, the second MOS transistor having a source connected to the ground node, a drain connected to the output node, and a gate connected to the data input node;
a third MOS transistor of the first conductivity type, the third MOS transistor having a source, a drain connected to the source of the first MOS transistor, and a gate supplied with a predetermined potential level between the source potential level and the ground potential level; and
a resistor which comprises a fourth MOS transistor of the first conductivity type, the fourth MOS transistor having a source connected to the source node, a drain connected to the source of the third MOS transistor and a gate connected to the ground node.
8. The drive circuit according to claim 7 , wherein the third MOS transistor supplies a constant current to the output node.
9. A drive circuit comprising:
a source node supplied with a source potential level;
a ground node supplied with a ground potential level;
a data input node for receiving data;
an output node to which a light-emitting device is connected;
a first MOS transistor of a first conductivity type, the first MOS transistor having a source, a drain connected to the output node, and a gate connected to the data input node;
a second MOS transistor of a second conductivity type, the second MOS transistor having a source connected to the ground node, a drain connected to the output node, and a gate connected to the data input node;
a third MOS transistor of the first conductivity type, the third MOS transistor having a source, a drain connected to the source of the first MOS transistor, and a gate supplied with a predetermined potential which is less than the source potential level and more than the ground potential level; and
a resistor connected between the source node and the source of the third MOS transistor.
10. A drive circuit comprising:
a source node supplied with a source potential level;
a ground node supplied with a ground potential level;
a data input node for receiving date;
an output node to which a light-emitting device is connected;
a first MOS transistor of a first conductivity type, the first MOS transistor having a source, a drain connected to the output node, and a gate supplied with a predetermined potential level which is less than the source potential level and more than the ground potential level;
a second MOS transistor of the first conductive type, the second MOS transistor having a source connected to the source node, a drain connected to the source of the first MOS transistor, and a gate connected to the data input node; and
a third MOS transistor of a second conductive type, the third MOS transistor having a source connected to the ground node, a drain connected to the output node, and a gate connected to the data input node.
11. The drive circuit according to claim 10 , wherein the first MOS transistor supplies a constant current to the output node.
12. A drive circuit comprising:
a constant current generator comprising
an operational amplifier having an inversion terminal to which a reference voltage is applied, a non-inversion terminal and an output terminal,
a first MOS transistor of a first conductivity type, wherein the first MOS transistor has a source, a drain connected to the non-inversion terminal of the operational amplifier and a gate connected to the output terminal of the operational amplifier, and
a second MOS transistor of the first conductivity type, wherein the second MOS transistor has a source connected to a source node supplied with a source potential, a drain connected to the source of the first MOS transistor and a gate connected to a gate node supplied with a gate potential level; and
a data line driver comprising
an input node for receiving data,
an output node,
a third MOS transistor of the first conductivity type, wherein the third MOS transistor has a source, a drain connected to the output node, and a gate connected to the input node,
a fourth MOS transistor of the first conductivity type, wherein the fourth MOS transistor has a source, a drain connected to the source of the third MOS transistor, and a gate connected to the gate of the first MOS transistor, and
a resistor connected between the source of the fourth MOS transistor and the source node.
13. The drive circuit according to claim 12 , wherein the resistor comprises a MOS transistor.
14. The drive circuit according to claim 12 , wherein the fourth MOS transistor supplies a constant current to the output node.
15. The drive circuit according to claim 12 , wherein the data line driver further comprises a fifth MOS transistor of a second conductivity type, the fifth MOS transistor having a source connected to the ground node, a drain connected to the output node, and a gate connected to the input node.
16. A drive circuit comprising:
a constant current generator comprising
an operational amplifier having a non-inversion terminal to which a reference voltage is applied, an inversion terminal and an output terminal,
a first MOS transistor of a first conductivity type, wherein the first MOS transistor has a source, a drain connected to the inversion terminal of the operational amplifier and a gate connected to the output terminal of the operational amplifier, and
a second MOS transistor of the first conductivity type, wherein the second MOS transistor has a source connected to a ground node supplied with a ground potential level, a drain connected to the source of the first MOS transistor and a gate connected to a source node supplied with a source potential level; and
a data line driver comprising
an input node for receiving data,
an output node,
a third MOS transistor of the first conductivity type, wherein the third MOS transistor has a source, a drain connected to the output node, and a gate connected to the input node,
a fourth MOS transistor of the first conductivity type, wherein the fourth MOS transistor having a source, a drain connected to the source of the third MOS transistor, and a gate connected to the gate of the first MOS transistor, and
a resistor connected between the source of the fourth MOS transistor and the ground node.
17. The drive circuit according to claim 16 , wherein the resistor comprises a MOS transistor.
18. The drive circuit according to claim 16 , wherein the fourth MOS transistor supplies a constant current to the output node.
19. The drive circuit according to claim 16 , further including a fifth MOS transistor of a second conductivity type, the fifth MOS transistor having a source connected to the source node, a drain connected to the output node, and a gate connected to the input node.