Digital implementation of multi-channel demodulators
View Patent ↗A method and circuitry for implementing digital multi-channel demodulation circuits. More particularly, embodiments of the present invention provide a digital multi-channel demodulator circuit. The demodulator includes a frequency-block down-converter that receives a multi-channel analog RF signal and shifts the multi-channel analog RF signal to a lower frequency band. An ADC receives the multi-channel analog RF signal from the frequency-block down-converter and converts the multi-channel analog RF signal to a multi-channel digital RF signal. A digital channel demultiplexer receives the multi-channel digital RF signal from the ADC and demultiplexes the multi-channel digital RF signal into separate digital RF channels.
1. A digital multi-channel demodulator circuit for processing a multi-channel analog RF signal, the multi-channel demodulator comprising:
a frequency-block down-converter configured to receive the analog RF signal and to shift the analog RF signal to a lower frequency band;
an analog-to-digital converter (ADC) configured to receive the analog RF signal from the frequency-block down-converter and to convert the analog RF signal to a multi-channel digital RF signal;
a digital channel demultiplexer configured to receive the digital RF signal from the ADC and to demultiplex the digital RF signal into a plurality of separate digital RF channels; and
one or more demodulators configured to receive and demodulate one or more digital RF channels selected from the plurality of separate digital RF channels.
2. The circuit of claim 1 further comprising:
a selector configured to receive the plurality of separate digital RF channels from the digital channel demultiplexer and to select the one or more digital RF channels to be received by the one or more demodulators.
3. The circuit of claim 1 wherein each separate digital RF channel comprises one or more data streams to be accessed or used by a subscriber.
4. The circuit of claim 2 wherein the one or more demodulators demodulate only the RF channels that are selected by the selector.
5. The circuit of claim 2 further comprising a digital transport interface configured to receive the selected RF channels from the one or more demodulators and to output the selected RF channels.
6. The circuit of claim 1 further comprising a bandpass filter to reduce aliasing from unwanted signals.
7. The circuit of claim 1 wherein the ADC is a high-speed ADC.
8. The circuit of claim 1 wherein the ADC converts an entire signal band, the signal band including the multi-channel analog RF signal.
9. The circuit of claim 1 wherein the one or more demodulators share resources.
10. The circuit of claim 1 wherein the digital channel demultiplexer includes a digital tuner.
11. The circuit of claim 10 wherein the digital tuner comprises:
a numeric control oscillator (NCO) configured to generate a select frequency, the select frequency being associated with a corresponding RF channel;
a complex multiplier configured to receive the digital RF signal and to multiply the digital RF signal with the select frequency; and
a low-pass filter (LPF) configured to receive the digital RF signal and to pass the corresponding RF channel.
12. The circuit of claim 11 wherein the LPF is a high-speed finite impulse response (FIR) filter.
13. The circuit of claim 1 wherein the digital multi-channel demodulator circuit processes downstream signals in at least one of a satellite system, a terrestrial TV system, and a cable system.
14. A system using the circuit of claim 1 in combination with memory.
15. A system using the circuit of claim 1 in combination with a processor.
16. The circuit of claim 1 wherein the digital channel demultiplexer is a polyphase channel demultiplexer.
17. The circuit of claim 16 wherein the polyphase channel demultiplexer comprises:
one or more low-pass filters (LPF) configured to receive the multi-channel digital RF signal and to synchronize the RF channels;
a discrete Fourier transform circuit (DFT) configured to receive the digital RF signal and to demultiplex the digital RF signal into separate RF channels.
18. The circuit of claim 17 wherein the DFT is a combination of different fast Fourier transforms.
19. The circuit of claim 17 wherein the polyphase channel demultiplexer comprises at least two LPFs, the coefficients of each LPF filter being a part of a bigger low-pass filter.
20. The circuit of claim 17 wherein the LPFs are low-speed finite impulse response (FIR) filters.
21. A polyphase channel demultiplexer for use in multi-channel demodulation, the polyphase channel demultiplexer comprising:
a down-sample circuit that samples a multi-channel digital RF signal;
a plurality of low-pass filters (LPFs) configured to receive the sampled multi-channel digital RF signal and to synchronize RF channels; and
a discrete Fourier transform circuit (DFT) configured to receive the sampled multi-channel digital RF signal and to demultiplex the sampled multi-channel digital RF signal into separate RF channels.
22. The circuit of claim 21 wherein the DFT is a combination of different fast Fourier transforms.
23. The circuit of claim 21 wherein the polyphase channel demultiplexer comprises at least two LPFs, the coefficients of each LPF filter being a part of a bigger low-pass filter.
24. The circuit of claim 21 wherein the LPFs are low-speed finite impulse response (FIR) filters.
25. The circuit of claim 21 wherein the polyphase channel demultiplexer processes downstream signals in at least one of a satellite system, a terrestrial TV system, and a cable system.