IP Library Granted Patent US 7,334,142
Granted Patent B2
US 7,334,142 · App. 10/763,094 · Granted Feb 19, 2008

Reducing power consumption in a logically partitioned data processing system with operating system call that indicates a selected processor is unneeded for a period of time

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Quick Facts
Patent No.
US 7,334,142
App. No.
10/763,094
Granted
Feb 19, 2008
Kind
B2
Abstract

A method, apparatus, and computer instructions for managing a set of processors. A call from an operating system is received. The call indicates that a selected processor in the set of processors is unneeded for a period of time. In response to receiving this call, the operation of the selected processor is altered to reduce power usage during the period of time.

Claims (12)

1. A method in a data processing system for managing a set of processors, the method comprising:

receiving a call from an operating system, wherein the call indicates that a selected processor in the set of processors is unneeded for a period of time that is included in the call from the operating system, wherein the call is a sub-processor partitioning call sent from one of a plurality of different operating systems which are each executing in a respective partition of a multi-partitioned data processing system, where each partition of the multi-partitioned data processing system is managed by a runtime abstraction layer and (i) is assigned a non-overlapping subset of resources of the data processing system, and (ii) can be individually booted and shut down without having to power-cycle entirety of the data processing system; and

altering operation of the selected processor to reduce power usage during the period of time, wherein the receiving step and the altering step are performed by the runtime abstraction layer that receives the call from at least one of a plurality of operating systems that are concurrently executing in the data processing system.

2. The method of claim 1 , wherein the period of time is specified in the call from the operating system and is a time during which idle cycles are present for the selected processor.

3. The method of claim 1 , wherein the selected processor is in an original state prior altering operation of the selected processor and further comprising:

returning the selected processor to the original state after the period of time has elapsed.

4. The method of claim 3 further comprising:

returning the selected processor to the original state if the period of time has not elapsed and an external interrupt indicating work is present for the selected processor is received.

5. The method of claim 1 , wherein the altering step comprises:

reducing a clock speed of the selected processor.

6. The method of claim 1 , wherein the altering step comprises:

placing the selected processor in a sleep mode if the period of time is greater than a predetermined threshold.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2013
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: INTEL CORPORATION
Reel/Frame 030228/0415 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 9, 2004
From: HACK, MARK ELLIOTT
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 014316/0752 →