IP Library Granted Patent US 7,492,402
Granted Patent B2
US 7,492,402 · App. 10/763,121 · Granted Feb 17, 2009

Image-processing device, image-processing method and solid-state image pickup device

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Quick Facts
Patent No.
US 7,492,402
App. No.
10/763,121
Granted
Feb 17, 2009
Kind
B2
Abstract

An image-processing device is provided that applies gate voltage in order to obtain a high quality image. The image-processing device comprises a solid-state image pickup element provided with a plurality of unit pixels each including a photo diode and a plurality of transistors for detecting an optical signal, a circuit for changing gate-applied voltage that changes a voltage applied to each gate of a plurality of the transistors. The circuit for changing gate-applied voltage applies a predetermined voltage to each gate of a plurality of the transistors from the first voltage source while in an accumulation state when carriers are generated from the photo diode in response to received light, and/or applies another predetermined voltage from the second voltage while in a reading out state when a signal in response to carriers accumulated in the accumulation state is read out.

Claims (21)

1. An image-processing device comprising:

a solid-state image pickup element provided with a plurality of unit pixels, each unit pixel including a photo diode and at least one transistor for detecting an optical signal; and

a circuit for changing a gate-applied voltage that changes a voltage applied to each gate of a plurality of the transistors;

the circuit for changing the gate-applied voltage applying a first voltage to each gate of a plurality of the transistors in a plurality of lines from a first voltage source while in an accumulation state when carriers are generated from the photo diode in response to received light,

the circuit for changing the gate-applied voltage applying a second voltage to each of the gates of the plurality of transistors in the plurality of lines while in a reset state after the accumulation state, and

the circuit for changing the gate-applied voltage applying a third voltage from a second voltage source to each of the gates of the plurality of transistors in a selected one of the plurality of lines while in a reading out state when a signal in response to carriers accumulated in the accumulation state is read out after the reset state.

2. The image-processing device according to claim 1 , the circuit for changing the gate-applied voltage applying a forth voltage to each of the gates of the plurality of the transistors in the plurality of lines from a third voltage source while in a clearing state when residual carriers in the solid-state image pickup device are excluded from the solid-state image pickup device.

3. The image-processing device according to claim 2 further comprising:

a circuit for changing a source-applied voltage that changes a voltage applied to each source of the plurality of the transistors,

the circuit for changing the source-applied voltage applying a fifth voltage to each of the sources of the plurality of the transistors while in the clearing state, and

an output voltage while in the clearing state being equal to a sum of the third voltage and the fifth voltage.

4. The image-processing device according to claim 2 , the circuit for changing the gate-applied voltage applying the second voltage to each of the gates of the plurality of the transistors in the plurality of lines while in a second reset state after the clearing state, and

the circuit for changing the gate-applied voltage applying the third voltage to each of the gates of the plurality of the transistors in the selected one of the plurality of lines while in a second reading out state when an offset voltage including a noise component is read out after the second reset state.

5. The image-processing device according to claim 1 further comprising:

a plurality of gate voltage supplying circuits coupled to the gates of the plurality of the transistors;

wherein the changed applied voltage is applied to a plurality of the gate voltage supplying circuits from the circuit for changing the gate-applied voltage.

6. The image-processing device according to claim 1 further comprising:

a plurality of gate voltage supplying circuits coupled to the gates of the plurality of the transistors;

wherein each of the plurality of the gate voltage supplying circuits includes the circuit for changing the gate-applied voltage.

7. The image-processing device according to claim 1 , the circuit for changing the gate-applied voltage applying the third voltage from the second voltage source to each of the gates of the plurality of transistors of the plurality of lines while in a preset state after the reading out state.

8. The image-processing device according to claim 1 , the circuit for changing the gate-applied voltage applying the first and third voltages based on an accumulation enable signal and a reading out enable signal, respectively.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2021
From: ADVANCED INTERCONNECT SYSTEMS LIMITED
To: NVIDIA CORPORATION
Reel/Frame 056754/0070 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2018
From: SEIKO EPSON CORPORATION
To: ADVANCED INTERCONNECT SYSTEMS LIMITED
Reel/Frame 046464/0045 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2004
From: NASU, HIROAKI
To: SEIKO EPSON CORPORATION
Reel/Frame 015404/0049 →