Substrate bias switching unit for a low power processor
The feature of the present invention consists in: a processor main circuit for executing program instruction strings on a processor chip; a substrate bias switching unit for switching voltages of substrate biases applied to a substrate of the processor main circuit; and an operation mode control unit for controlling, in response to the execution of an instruction to proceed to a stand-by mode in the processor main circuit, the substrate bias switching unit in such a way that the biases are switched over to voltages for the stand-by mode, and for controlling, in response to an interruption of the stand-by release from the outside, the substrate bias switching unit in such a way that the biases are switched over to voltages for a normal mode, and also for releasing, after the bias voltages switched thereto have been stabilized, the stand-by of the processor main circuit to restart the operation.
1. A system comprising:
a processor chip;
a power source monitoring circuit to monitor a voltage level of a power source to supply a supply voltage to the processor chip;
a capacitor to hold the supply voltage even when the power source cannot supply voltage higher than a predetermined voltage level;
wherein the processor chip comprises a logic circuit;
wherein the power source monitoring circuit keeps a control signal in a first state, while the voltage level is below the predetermined voltage level, and
wherein the logic circuit is controlled to change an operation mode from a normal operation mode to a standby mode in response to a change of the control signal from a second state to the first state;
wherein the processor chip comprises a substrate bias control circuit to control a substrate bias voltage of a transistor of the processor chip so that an absolute value of a threshold voltage of the transistor in the standby mode is higher than the absolute value of the threshold voltage of the transistor in the normal operation mode;
wherein the logic circuit is controlled not to change input of the logic circuit in the standby mode, and
wherein when the processor chip changes from the standby mode to the normal operation mode, the substrate bias control circuit starts to change the substrate bias voltage of the transistor of the processor chip first and the logic circuit is controlled to change the input of the logic circuit after the substrate bias voltage becomes a predetermined voltage.
2. The system according to claim 1 , wherein a power consumption of the processor chip in the standby mode is lower than a power consumption of the processor chip in the normal operation mode.
3. The system according to claim 1 , wherein the processor chip includes a processor circuit, and
the processor chip changes the operation mode from the normal operation mode to the standby mode in response to an instruction from the processor circuit.
4. The system according to claim 1 ,
wherein the processor chip comprises an input control circuit connected to the input of the logic circuit;
wherein the input control circuit controls the input of the logic circuit to be a predetermined level in the standby mode.
5. The system according to claim 1 , wherein the processor chip detects whether the substrate bias voltage becomes the predetermined voltage by counting a predetermined time.
6. A method to hold a voltage level of a power source comprising:
providing a system including a processor chip that comprises a logic circuit, a supply voltage of the processor chip being supplied from a power source;
monitoring a voltage level of the power source to supply a supply voltage to the processor chip;
keeping a control signal in a first state, while the voltage level is below a predetermined voltage level;
controlling to change an operation mode of the logic circuit from a normal operation mode to a standby mode in response to a change of the control signal from a second state to the first state;
supplying the supply voltage from a capacitor to hold the supply voltage while the power source cannot supply a supply voltage higher than the predetermined voltage level;
supplying the supply voltage from the power source to the transistor as the substrate bias voltage in the normal operation mode;
supplying a first substrate bias voltage so that an absolute value of a threshold voltage in a standby mode is higher than the absolute value of the threshold voltage of the transistor in the normal operation mode;
controlling the logic circuit not to change input of the logic circuit in the standby mode; and
recovering the substrate bias voltage from the first substrate bias voltage to the supply voltage from the power source and controlling the logic circuit to change the input of the logic circuit after the substrate bias voltage becomes a predetermined voltage when the operation made of the processor changes from the standby mode to the normal operation mode.
7. The method according to claim 6 , wherein a power consumption of the processor chip in the standby mode is lower than the power consumption of the processor chip in the normal operation mode.
8. The method according to claim 6 , wherein the processor chip includes a processor circuit, and the processor chip changes the operation mode from the normal operation mode to the standby mode in response to an instruction from the processor circuit.
9. The method according to claim 6 , further including controlling the input of the logic circuit to be a predetermined level in the standby made.
10. The method according to claim 6 , wherein the processor chip detects whether the substrate bias voltage becomes the predetermined voltage by counting a predetermined time.