Multijunction solar cell with a bypass diode having an intrinsic layer
View Patent ↗A multijunction solar cell including first and second solar cells on a substrate with an integral bypass diode having an intrinsic layer and operative for passing current when the multijunction solar cell is shaded. In one embodiment, a vertical sequence of solar cells are epitaxially grown on a first portion of the substrate, and the layers of the diode are epitaxially grown on a second portion of the substrate with the layers of the bypass diode being deposited subsequent to the layers of the top solar cell.
1. A solar cell semiconductor device comprising:
a semiconductor body having a sequence of layers of semiconductor material including a first region in which the sequence of layers of semiconductor material forms a sequence of cells of a multijunction solar cell with a top layer of a top cell having a first polarity; and
a second region in which the sequence of layers is laterally spaced apart and laterally separated from said first region and in which the sequence of layers forms a support for an integral bypass diode to protect said sequence of cells against reverse biasing at less than breakdown voltage, a bottom layer of the bypass diode having said first polarity;
a metal layer in contact with the sequence of layers of semiconductor material disposed underneath the bypass diode in the second region, the metal layer shorting the layers of semiconductor material under the bypass diode in the second region;
wherein the first region and the second region have an identical sequence of layers where each layer in the first region has the same composition and thickness as the corresponding layer in the second region, subject to normal manufacturing variations, and form the semiconductor body.
2. A solar cell semiconductor device comprising:
a substrate;
a first sequence of layers of semiconductor material deposited on said substrate, including a first region in which the sequence of layers of semiconductor material forms at least one cell of a multijunction solar cell where a top layer of a top cell has a first polarity;
a second region including said first sequence of layers, and a second sequence of layers that forms a bypass diode to protect said at least one cell against reverse biasing at less than breakdown voltage where a bottom layer of the bypass diode has the same polarity as said first polarity of said top cell;
a metal layer deposited on a portion of said substrate and over at least a portion of said second region for electrically shorting the first sequence of layers of said second region and to electrically connect to said bypass diode in said second region; and
wherein the first region and the second region have an identical sequence of semiconductor layers where each layer in the second region has the same composition and thickness as the corresponding layer in the first region, subject to normal manufacturing variations, and form an integral semiconductor body and wherein said bypass diode includes p-type, i-type, and n-type layers.
3. A solar cell semiconductor device comprising:
a substrate;
an integral semiconductor body having a sequence of layers of semiconductor material deposited on said substrate including a first region in which the sequence of layers of semiconductor material forms a sequence of cells of a multijunction solar cell, with a top layer of a top cell having a first polarity; and
a second region in which the sequence of layers is laterally spaced apart and laterally separated from said first region and in which the sequence of layers corresponding to the sequence of layers forming said cells forms a support structure for a bypass diode to protect said multijunction solar cell against reverse biasing at less than breakdown voltage, said bypass diode comprising a plurality of layers, wherein a bottom layer of said plurality of layers of the bypass diode has the same polarity as said first polarity of said top layer of said top cell;
an electrically conductive shunt in contact with the sequence of layers of semiconductor material disposed between the bypass diode and the substrate in the second region, the shunt shorting the layers of semiconductor material in the second region;
wherein the first region and the second region have an identical sequence of semiconductor layers where each layer in the first region has the same composition and thickness as the corresponding layer in the second region, subject to normal manufacturing variations, and form a portion of said integral semiconductor body.
4. A device as defined in claim 3 , wherein the sequence of layers of said multijunction solar cell and the sequence of layers of the support structure are formed in the same process step.
5. A device as defined in claim 3 , wherein the bypass diode comprises GaAs.
6. A solar cell semiconductor device comprising:
a substrate;
a sequence of layers of material deposited on said substrate, including a first region in which the sequence of layers of material forms a plurality of cells of a multijunction solar cell, and a second region in which the sequence of layers corresponding to the sequence of layers forming said cells forms a support for a bypass diode to protect said cell against reverse biasing;
a planar lateral conduction layer deposited over the sequence of layers in the second region for making electrical contact to an active region of said bypass diode; and
an electrically conductive shunt extending from the lateral conduction layer to the substrate in contact with the sequence of layers of material disposed underneath the bypass diode in the second region so that the layers of material under the bypass diode are shorted in the second region; wherein
a topmost layer of a topmost cell has a first polarity; and
a bottom layer of the bypass diode has the same said first polarity as said topmost layer of said topmost cell; wherein
the first region and the second region have an identical sequence of semiconductor layers where each layer in the first region has the same composition and thickness as the corresponding layer in the second region, subject to normal manufacturing variations, and the first region and the second region constitute an integral semiconductor body.
7. A device as defined in claim 6 , further comprising:
a lateral conduction layer deposited over the sequence of layers in the first region;
wherein said lateral conduction layer in the first region is physically separated from the lateral conduction layer in the second region.
8. A device as defined in claim 6 , wherein said lateral conduction layer is a highly doped layer.
9. A device as defined in claim 8 , wherein said lateral conduction layer is composed of GaAs.
10. A device as defined in claim 6 , further comprising an etch stop layer, deposited over said lateral conduction layer.
11. A device as defined in claim 6 , wherein said substrate forms an electrical connection path between said multijunction solar cell and said bypass diode.
12. A solar cell semiconductor device comprising:
a substrate;
a sequence of layers of semiconductor material deposited on said substrate including a first region in which the sequence of layers of semiconductor material forms at least one cell of a multijunction solar cell, and a second region in which a sequence of layers corresponding to the sequence of layers forming said at least one cell forms a bypass diode that functions to protect said cell against reverse biasing; and
wherein the sequence of layers in the first and second regions includes a lateral conduction layer including a first portion disposed in said first region, and a second portion disposed in said second region and physically separated from said first portion; and further
wherein:
a metal layer is disposed between the second portion of the lateral conduction layer and the substrate in contact with the sequence of layers of semiconductor material disposed underneath the bypass diode in the second region, the metal layer shorting the layers of semiconductor material under the bypass diode in the second region;
a topmost layer of a topmost cell has a first polarity;
a bottom layer of the bypass diode has the same polarity as said first polarity of said topmost cell; and
the first region and the second region have an identical sequence of semiconductor layers where each layer in the first region has the same composition and thickness as the corresponding layer in the second region, subject to normal manufacturing variations, and form an integral semiconductor body.
13. A device as defined in claim 12 , wherein said lateral conduction layer is a highly doped layer.
14. A device as defined in claim 12 , wherein said lateral conduction layer is composed of GaAs.
15. A device as defined in claim 12 , wherein one of the layers of said sequence of layers is a cap layer, and said lateral conduction layer is disposed directly over said cap layer.
16. A device as defined in claim 12 , wherein said second portion of said lateral conduction layer makes electrical contact with a layer of said bypass diode.
17. A solar cell semiconductor device comprising:
a substrate;
a sequence of layers of semiconductor material deposited on said substrate including a first region in which a lower portion of said sequence of layers of semiconductor material forms a multijunction solar cell, and a second region in which an upper portion of said sequence of layers forms a bypass diode to protect said cell against reverse biasing at less than breakdown voltage;
a highly conductive lateral conduction layer deposited over the portion of said sequence of layers forming the multijunction solar cell, for making electrical contact with one layer of said bypass diode and forming a contact region to allow said bypass diode to be electrically connected to said multijunction solar cell; and
an electrically conductive shunt extending from the lateral conduction layer to the substrate in contact with the sequence of layers of semiconductor material disposed between the bypass diode and the substrate in the second region, the shunt shorting the layers of semiconductor material in the second region; wherein
a topmost layer of a topmost cell has a first polarity; and
a bottom layer of the bypass diode has the same polarity as said first polarity of said topmost cell; and
the first region and the second region have an identical sequence of semiconductor layers where each layer in the first region has the same composition and thickness as the corresponding layer in the second region, subject to normal manufacturing variations, and form an integral semiconductor body.
18. A device as defined in claim 17 , wherein said lateral conduction layer includes a first portion disposed in said first region, and a second portion disposed in said second region and separated from the first portion, and the shunt is connected to the second portion of the lateral conduction layer.
19. A device as defined in claim 17 , wherein said lateral conduction layer is composed of GaAs.
20. A device as defined in claim 18 , wherein said second portion of said lateral conduction layer makes electrical contact with a first active layer of said bypass diode.