Method of manufacturing a dual gate semiconductor device with a poly-metal electrode
View Patent ↗In order to realize a dual gate CMOS semiconductor device with little leakage of boron that makes it possible to divisionally doping a p-type impurity and an n-type impurity into a polycrystalline silicon layer with one mask, a gate electrode has a high melting point metal/metallic nitride barrier/polycrystalline silicon structure. The boron is pre-doped in the polycrystalline silicon layer. The phosphorus or arsenic is doped in an n-channel area. Then, the annealing in a hydrogen atmosphere with vapor added therein is performed. As a result, the boron is segregated on the interface of the metallic nitride film and the phosphorus is segregated on the interface of the gate oxide film, for forming an n+ gate.
1. A method of manufacturing a semiconductor device having an NMOS and a PMOS, comprising:
forming a gate insulating film on a semiconductor substrate;
forming a semiconductor film on said gate insulating film;
forming a mask for covering an area where said PMOS is formed, introducing phosphorus onto a corresponding portion of said semiconductor film to an area where said NMOS is formed, and performing an ion implantation of arsenic or antimony at such an energy as a projection range into the middle of said semiconductor film to said area where said NMOS is formed;
removing said mask and introducing boron onto the corresponding portion of said semiconductor film to the area where said NMOS is formed, and the corresponding portion of said semiconductor film to the area where said PMOS is formed;
forming a metallic nitride film on said semiconductor film on the areas where said NMOS and said PMOS are formed;
working a stacked film containing said semiconductor film and said metallic nitride film to form each gate electrode of said NMOS and said PMOS; and
performing an annealing in a nitrogen atmosphere or in a hydrogen atmosphere with water vapor added thereto.
2. A method as claimed in claim 1 , wherein, during annealing, boron is segregated on an interface of said metallic nitride film and said semiconductor film, and said phosphorus is segregated on an interface of said gate insulating film and said semiconductor film.
3. A method as claimed in claim 1 , wherein said semiconductor film formed on said gate insulating film is formed as an amorphous silicon, and said amorphous silicon is changed into polycrystalline silicon after said annealing.
4. A method as claimed in claim 1 , further comprising:
forming a metallic film on said metallic nitride film prior to working said stacked film, and said stacked film containing said semiconductor film, said metallic nitride film and said metallic film.
5. A method as claimed in claim 1 , wherein said gate insulating film is a silicon oxynitride film.
6. A method of as claimed in claim 1 , wherein said boron is introduced by ion implanting.
7. A method of manufacturing a semiconductor device having an NMOS and a PMOS, comprising:
a first step of forming a gate insulating film on an amorphous semiconductor substrate;
a second step of forming an amorphous semiconductor film on said gate insulating film;
a third step of forming a mask for covering an area where said PMOS is formed, and introducing phosphorus onto the corresponding portion of said amorphous semiconductor film to an area where said NMOS is formed, and performing an ion implantation of arsenic or antimony at such an energy as a projection range into the middle of said amorphous semiconductor film to said area where said NMOS is formed;
a fourth step of removing said mask and introducing boron onto the corresponding portion of said amorphous semiconductor film to the area where said NMOS is formed, and the corresponding portion of said amorphous semiconductor film to the area where said PMOS is formed;
a fifth step of forming a metallic nitride film on said semiconductor film on the areas where said NMOS and said PMOS are formed;
a sixth step of working a stacked film containing said semiconductor film and said metallic nitride film to form each gate electrode of said NMOS and said PMOS; and
a seventh step of performing an annealing in a nitrogen atmosphere or in a hydrogen atmosphere with water vapor added therto, and making said amorphous semiconductor film into polycrystalline silicon film.
8. A method as claimed in claim 7 , wherein, at said seventh step, boron is segregated on an interface of said metallic nitride film and amorphous semiconductor film, and said phosphorus is segregated on an interface of said gate insulating film and amorphous semiconductor film.
9. A method as claimed in claim 7 , further comprising an eighth step of forming a metallic film on said metallic nitride film between said fifth and sixth steps, and wherein at said sixth step, a gate electrode is composed of a stacked film containing said amorphous semiconductor film, said metallic nitride film and said metallic film.
10. A method as claimed in claim 7 , wherein said gate insulating film is a silicon oxynitride film.
11. A method of manufacturing a semiconductor device having an NMOS and a PMOS, comprising:
a first step of forming a gate insulating film on a semiconductor substrate;
a second step of forming a semiconductor film on said gate insulating film;
a third step of forming a mask for covering an area where said PMOS is formed, and introducing phosphorus onto the corresponding portion of said semiconductor film to an area where said NMOS is formed, and performing an ion implantation of arsenic or antimony at such an energy as a projection range into the middle of said semiconductor film to said area where said NMOS is formed;
a fourth step of removing said mask and introducing boron onto the corresponding portion of said semiconductor film to the area where said NMOS is formed and the corresponding portion of said semiconductor film to the area where said PMOS is formed;
a fifth step of forming a metallic nitride film on said semiconductor film on the areas where said NMOS and said PMOS are formed;
a sixth step of forming a metallic film on said metallic nitride film on the areas where said NMOS and said PMOS are formed;
a seventh step of working a stacked film containing said semiconductor film, metallic nitride film and said metallic film for forming each gate electrode of said NMOS and said PMOS; and
an eighth step of performing an annealing in a nitrogen atmosphere or in a hydrogen atmosphere with water vapor added thereto.
12. A method as claimed in claim 11 , wherein, at said eighth step, boron is segregated on an interface of said metallic nitride film and semiconductor film, and said phosphorus is segregated on an interface of said gate insulating film and semiconductor film.
13. A method as claimed in claim 11 , wherein said semiconductor film formed on said gate insulating film is formed as an amorphous silicon at said second step, and said amorphous silicon is changed into polycrystalline silicon after said annealing at said eighth step.
14. A method as claimed in claim 11 , wherein said gate insulating film is a silicon oxynitride film.
15. A method as claimed in claim 11 , wherein, at said fourth step, said boron is introduced by ion implanting.