Method of manufacturing a dual gate semiconductor device with a poly-metal electrode
View Patent ↗In order to realize a dual gate CMOS semiconductor device with little leakage of boron that makes it possible to divisionally doping a p-type impurity and an n-type impurity into a polycrystalline silicon layer with one mask, a gate electrode has a high melting point metal/metallic nitride barrier/polycrystalline silicon structure. The boron is pre-doped in the polycrystalline silicon layer. The phosphorus or arsenic is doped in an n-channel area. Then, the annealing in a hydrogen atmosphere with vapor added therein is performed. As a result, the boron is segregated on the interface of the metallic nitride film and the phosphorus is segregated on the interface of the gate oxide film, for forming an n+ gate.
1. A semiconductor device having an NMOS and a PMOS, comprising:
each gate electrode of said NMOS and PMOS containing a polycrystalline silicon film formed on a gate insulating film and a metallic nitride film formed on said polycrystalline silicon film;
said polycrystalline silicon film of said PMOS containing a p-type impurity;
said polycrystalline silicon film of said NMOS containing a p-type impurity and an n-type impurity; and
said n-type impurity contained in said polycrystalline silicon film of said NMOS being segregated to a side of an interface of said polycrystalline silicon film and said gate insulating film, and said p-type impurity contained in said NMOS being segregated to a side of an interface of said metallic nitride film and said polycrystalline silicon film.
2. A semiconductor device as claimed in claim 1 , wherein each gate electrode of said NMOS and PMOS contains a metallic film formed on said metallic nitride film.
3. A semiconductor device as claimed in claim 1 , wherein said p-type impurity is boron and said n-type impurity is phosphorus, arsenic or antimony.
4. A semiconductor device as claimed in claim 2 , wherein said p-type impurity is boron and said n-type impurity is phosphorus, arsenic or antimony.
5. A semiconductor device as claimed in claim 1 , wherein said gate insulating film is a silicon oxynitride film.
6. A semiconductor device as claimed in claim 2 , wherein said gate insulating film is a silicon oxynitride film.
7. A semiconductor device having an NMOS and a PMOS, comprising:
each gate electrode of said NMOS and PMOS containing a polycrystalline silicon film formed on a gate insulating film, a metallic nitride film formed on said polycrystalline silicon film and a metallic film formed on said metallic nitride film;
said polycrystalline silicon film of said PMOS containing a p-type impurity;
said polycrystalline silicon film of said NMOS containing a p-type impurity and an n-type impurity; and
said n-type impurity contained in said polycrystalline silicon film of said NMOS being segregated to a side of an interface of said polycrystalline silicon film and said gate insulating film, and said p-type impurity contained in said NMOS being segregated to a side of an interface of said metallic nitride film and said polycrystalline silicon film.
8. A semiconductor device as claimed in claim 7 , wherein said p-type impurity is boron and said n-type impurity is phosphorus, arsenic or antimony.
9. A semiconductor device as claimed in claim 7 , wherein said gate insulating film is a silicon oxynitride film.
10. A semiconductor device as claimed in claim 8 , wherein said gate insulating film is a silicon oxynitride film.