Power supply for controlled parallel charging and discharging of batteries
View Patent ↗A power supply and switching technique is provided that utilizes a first battery and a second battery to charge a load. The power supply includes a first controlled power switch coupled to the first battery and the load, a second controlled power switch coupled to the second battery and the load, and a power controller coupled to the first controlled power switch, the second controlled power switch, and the load. The power controller monitors the voltage and the load and causes a charge to be applied to the load when the load voltage is not a predetermined voltage. The power controller causes a charge to be applied to the load by selectively closing the first controlled power switch, thereby providing a charge from the first battery to the load, and/or selectively closing the second controlled power switch, thereby providing a charge from the second battery to the load. A similar switching technique may be used to recharge the first and second battery by alternately coupling them to an external power source.
1. A power supply for providing power from a battery having a positive terminal and negative terminal to a load having a first terminal and a second terminal, wherein the second terminal of the load is coupled to the negative terminal of the battery, the power supply comprising:
an inductor, wherein a first terminal of the inductor is coupled to the positive terminal of the battery;
a first transistor, wherein a gate of the first transistor is coupled to a first pulse generator, a drain of the first transistor is coupled to a second terminal of the inductor, and a source of the first transistor is coupled to the negative terminal of the battery;
a second transistor, wherein a drain of the second transistor is coupled to the second terminal of the inductor and a gate of the second transistor is coupled to a source of the second transistor, and the source of the second transistor is coupled to the first terminal of the load; and
a third transistor, wherein a gate of the third transistor is coupled to a second pulse generator, a drain of the third transistor is coupled to the source of the second transistor, and a source of the third transistor is coupled to the negative terminal of the battery.
2. The power supply of claim 1 , wherein the first and third transistors are NMOS transistors and the second transistor is a PMOS transistor.
3. The power supply of claim 1 , further comprising a fourth transistor, wherein a drain of the fourth transistor is coupled to the source of the second transistor, a gate of the fourth transistor is coupled to the second pulse generator, and a source of the fourth transistor is coupled to the gate of the second transistor and to the drain of the third transistor.
4. The power supply of claim 3 , wherein the fourth transistor is a PMOS transistor.
5. The power supply of claim 1 , further comprising:
a capacitor, wherein a first terminal of the capacitor is coupled to the positive terminal of the battery and a second terminal of the capacitor is coupled to the negative terminal of the battery.
6. The power supply of claim 1 , further comprising:
a capacitor, wherein a first terminal of the capacitor is coupled to the source of the second transistor and a second terminal of the capacitor is coupled to the negative terminal of the battery.
7. The power supply of claim 1 , wherein the first pulse generator is adapted to generate a plurality of pulses, wherein each of the plurality of pulses is used to store charge in the inductor.
8. The power supply of claim 1 , wherein the second pulse generator is adapted to generate a plurality of pulses, wherein each of the plurality of pulses is used to release charge stored in the inductor into the load.
9. The power supply of claim 1 , wherein the first pulse generator and the second pulse generator are controlled by a power controller.
10. The power supply of claim 1 , wherein the battery is a battery cell.
11. A power supply for providing power from first and second batteries, each having a positive terminal and negative terminal, to a load having a first terminal and a second terminal, wherein the second terminal of the load is coupled to the negative terminals of the first and second batteries, the power supply comprising:
a first inductor, wherein a first terminal of the first inductor is coupled to the positive terminal of the first battery;
a second inductor, wherein a first terminal of the second inductor is coupled to the positive terminal of the second battery; and
first and second controlled power switches, the first controlled power switch coupled to a second terminal of the first inductor and the positive and negative terminals of the first battery and the second controlled power switch coupled to a second terminal of the second inductor and the positive and negative terminals of the second battery, the first controlled power switches comprising
a first transistor, wherein a gate of the first transistor is coupled to a first pulse generator, a drain of the first transistor is coupled to the second terminal of the first inductor, and a source of the first transistor is coupled to the negative terminal of the first battery,
a second transistor, wherein a drain of the second transistor is coupled to the second terminal of the first inductor, a gate of the second transistor is coupled to a source of the second transistor, and the source of the second transistor is coupled to the first terminal of the load, and
a third transistor, wherein a gate of the third transistor is coupled to a second pulse generator, a drain of the third transistor is coupled to the source of the second transistor, and a source of the third transistor is coupled to the negative terminal of the first battery.
12. The power supply of claim 11 , wherein the first and third transistors are NMOS transistors and the second transistor is a PMOS transistor.
13. The power supply of claim 11 , wherein the first controlled power switch further comprises a fourth transistor, wherein a drain of the fourth transistor is coupled to the source of the second transistor, a gate of the fourth transistor is coupled to the second pulse generator, and a source of the fourth transistor is coupled to the gate of the second transistor and to the drain of the third transistor.
14. The power supply of claim 13 , wherein the fourth transistor is a PMOS transistor.
15. The power supply of claim 11 , further comprising:
a first capacitor, wherein a first terminal of the first capacitor is coupled to the positive terminal of the first battery and a second terminal of the first capacitor is coupled to the negative terminal of the first battery; and
a second capacitor, wherein a first terminal of the second capacitor is coupled to the positive terminal of the second battery and a second terminal of the second capacitor is coupled to the negative terminal of the second battery.
16. The power supply of claim 11 , further comprising:
a first capacitor, wherein a first terminal of the first capacitor is coupled to the first controlled power switch and a second terminal of the first capacitor is coupled to the negative terminal of the first battery; and
a second capacitor, wherein a first terminal of the second capacitor is coupled to the second controlled power switch and a second terminal of the second capacitor is coupled to the negative terminal of the second battery.
17. The power supply of claim 11 , wherein the first pulse generator is adapted to generate a plurality of pulses, wherein each of the plurality of pulses is used to store charge in the first inductor.
18. The power supply of claim 11 , wherein the second pulse generator is adapted to generate a plurality of pulses, wherein each of the plurality of pulses is used to release charge stored in the first inductor into the load.
19. The power supply of claim 11 , wherein the first pulse generator and the second pulse generator are controlled by a power controller.
20. The power supply of claim 11 , wherein each of the first and second batteries is a battery cell.
21. The power supply of claim 11 , wherein the second controlled power switches comprises:
a fourth transistor, wherein a gate of the fourth transistor is coupled to a third pulse generator, a drain of the fourth transistor is coupled to the second terminal of the second inductor, and a source of the fourth transistor is coupled to the negative terminal of the second battery,
a fifth transistor, wherein a drain of the fifth transistor is coupled to the second terminal of the second inductor, a gate of the fifth transistor is coupled to a source of the fifth transistor, and the source of the fifth transistor is coupled to the first terminal of the load, and
a sixth transistor, wherein a gate of the sixth transistor is coupled to a second pulse generator, a drain of the sixth transistor is coupled to the source of the fifth transistor, and a source of the sixth transistor is coupled to the negative terminal of the second battery.