Method for making a semiconductor device with a metal gate electrode
View Patent ↗A method for making a semiconductor device is described. In that method, a metal layer is formed on a dielectric layer, which is formed on a substrate. After forming a masking layer on the metal layer, the sides of the masking layer are lined with a sacrificial layer.
1. A method for making a semiconductor device comprising:
forming a dielectric layer on a substrate;
forming a metal layer on the dielectric layer;
forming on the metal layer a masking layer that has first and second sides;
lining the first and second sides of the masking layer with a sacrificial layer;
applying a plasma dry etch process to etch a first pant of the metal layer, and applying a wet etch process to etch a second part of the metal layer;
applying a wet etch process to etch the dielectric layer; and
applying a wet etch process to remove the sacrificial layer.
2. A method for making a semiconductor device comprising:
forming a dielectric layer on a substrate;
forming a first metal layer on a first part of the dielectric layer, leaving a second part of the dielectric layer exposed;
forming a second metal layer on the first metal layer and on the second part of the dielectric layer;
forming on the second metal layer a masking layer that has first and second sides;
lining the first and second sides of the masking layer with a sacrificial layer;
applying a plasma dry etch process to etch a first part of the second metal layer and a first part of the first metal layer, and applying a wet etch process to etch a second part of the second metal layer and a second part of the first metal layer;
applying a wet etch process to etch the dielectric layer; and
applying a wet etch process to remove the sacrificial layer.
3. A method for making a semiconductor device comprising:
forming a high-k gate dielectric layer on a substrate;
forming a first metal layer on the high-k gate dielectric layer;
removing part of the first metal layer;
forming a second metal layer on the first metal layer and on the high-k gate dielectric layer, a first part of the second metal layer covering the remaining part of the first metal layer and a second part of the second metal layer covering the high-k gate dielectric layer;
forming a polysilicon layer on the second metal layer;
removing part of the polysilicon layer to generate a patterned polysilicon layer that has first and second sides, and to expose a third part of the second metal layer;
depositing a sacrificial layer that comprises a material that is selected from the group consisting of silicon nitride, a carbon doped silicon nitride, and silicon dioxide onto the second metal layer, and onto the first and second sides of the patterned polysilicon layer, then applying an anisotropic plasma dry etch process to remove the sacrificial layer from the second metal layer;
removing the exposed third part of the second metal layer and the underlying part of the first metal layer; and
removing the sacrificial layer.