IP Library Granted Patent US 6,964,893
Granted Patent B2
US 6,964,893 · App. 10/813,451 · Granted Nov 15, 2005

Semiconductor device and method of fabricating the same

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,964,893
App. No.
10/813,451
Granted
Nov 15, 2005
Kind
B2
Abstract

A gate electrode of an n-type MIS transistor includes a first metal-containing film, which is formed in contact with a gate insulation film and has a Fermi level on a conductive band side from a substantial center of a band gap of a semiconductor substrate, and a second metal-containing film formed on the first metal-containing film and having a lower resistance than the first metal-containing film. A gate electrode of a p-type MIS transistor includes a conductive coating film, which is formed in contact with the gate insulation film and has a Fermi level on a valence band side from a substantial center of the band gap of the semiconductor substrate, and the second metal-containing film formed on the conductive coating film and having a lower resistance than the conductive coating film.

Claims (17)

1. A method of fabricating a semiconductor device comprising:

forming a structure comprising a p-well and an n-well formed on a surface of a semiconductor substrate, an n-type source and an n-type drain formed on the surface of the semiconductor substrate and configured to sandwich a channel region on a n-type MIS transistor formed at the p-well, an insulation film having openings, at bottom of which the p-well and the n-well are exposed, the n-type source and n-type drain formed on the p-well and configured to sandwich the associated opening, and a p-type source and a p-type drain formed on the n-well and configured to sandwich the associated opening;

forming a gate insulation film on the p-well and the n-well exposed at the bottoms of the openings;

forming a first metal-containing film on the p-well and the n-well exposed at the bottoms of the openings, the first metal-containing film having a Fermi level on a conductive band side from a substantial center of a band gap of the semiconductor substrate;

removing the first metal-containing film on the n-well;

forming a conductive coating film on the first metal-containing film and on the gate insulation film formed on the n-well, the conductive coating film having a Fermi level on a valence band side from a substantial center of the band gap of the semiconductor substrate; and

forming a second metal-containing film on the conductive coating film, the second metal-containing film having a lower resistance than the first metal-containing film and the conductive coating film, thus filling the openings.

2. A method according to claim 1 , wherein the formation of the conductive coating film including:

a step of forming an insulative coating film with a substantially flat surface on the first metal-containing film on the p-well and on the gate insulation film on the n-well, thus filling the openings;

a step of selectively etching the coating film and exposing the openings once again while leaving the coating film; and

a step of subjecting the coating film to a predetermined process, thereby making the coating film electrically conductive.

3. A method according to claim 2 , wherein said coating film is formed of an organic material containing carbon, and

said predetermined process subjects the coating film to heat treatment, laser anneal or electron radiation.

4. A method according to claim 2 , wherein said coating film is formed of an organic material having benzene rings serially connected, and iodine is introduced in the coating film in said predetermined process.

5. A method according to claim 1 , wherein the formation of the conductive coating film including:

a step of forming a conductive coating film with a substantially flat surface on the first metal-containing film on the p-well and on the gate insulation film on the n-well, thus filling the openings;

a step of selectively etching the coating film and exposing the openings once again while leaving the conductive coating film.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2017
From: TOSHIBA CORPORATION
To: MICROSOFT TECHNOLOGY LICENSING, LLC
Reel/Frame 041333/0955 →