IP Library Granted Patent US 7,180,098
Granted Patent B2
US 7,180,098 · App. 10/817,982 · Granted Feb 20, 2007

Optical isolator device, and method of making same

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Quick Facts
Patent No.
US 7,180,098
App. No.
10/817,982
Granted
Feb 20, 2007
Kind
B2
Abstract

The present invention is generally directed to an optical isolator device, and various methods of making same. In one illustrative embodiment, the method comprises obtaining a single SOI substrate, the SOI substrate having an active layer comprised of silicon and a buried insulation layer, forming a doped layer of silicon above the active layer of the SOI substrate, forming first and second isolated regions in at least the doped layer of silicon, forming a photon generating device in the first isolated region, and forming a photon receiving device in the second isolated region. In one illustrative embodiment, the device comprises a substrate comprised of a bulk layer of silicon, a buried insulation layer formed on the bulk silicon layer, and a doped layer of silicon positioned above the buried insulating layer, first and second isolated regions formed in the doped layer of silicon, a photon generating device formed in the first isolated region, and a photon receiving device formed in the second isolated region.

Claims (86)

1. A device, comprising:

a substrate comprised of a bulk layer of silicon, a buried insulation layer formed on said bulk silicon layer, and a doped layer of silicon positioned above said buried insulating layer;

first and second isolated regions formed in said doped layer of silicon;

a photon generating device formed in said first isolated region; and

a vertical photon receiving device formed in said second isolated region.

2. The device of claim 1 , wherein said doped layer of silicon is a doped layer of epitaxial silicon.

3. The device of claim 1 , wherein said doped layer of silicon has a thickness that ranges from approximately 10–30 microns.

4. The device of claim 1 , wherein said doped layer of silicon is formed on an active layer comprised of silicon that is formed on said buried insulation layer.

5. The device of claim 1 , wherein said doped layer of silicon is in contact with said buried insulation layer and said doped layer of silicon is comprised of silicon made by the Czochralski (CZ) method.

6. The device of claim 1 , wherein said buried insulation layer is comprised of silicon dioxide.

7. The device of claim 1 , wherein said first and second isolated regions are defined by a plurality of trench isolation regions.

8. The device of claim 7 , wherein said trench isolation regions extend through said doped layer of silicon and contact said buried insulation layer.

9. The device of claim 7 , wherein said trench isolation regions are filled with at least one insulating material.

10. The device of claim 1 , wherein said doped layer of silicon is doped with an N-type dopant material.

11. The device of claim 1 , wherein said doped layer of silicon has a dopant concentration that ranges from approximately 10 18 –10 19 ions/cm 3 .

12. The device of claim 1 , wherein said photon generating device is comprised of at least one of a forward biased diode, a reverse biased diode and a bipolar transistor.

13. The device of claim 1 , wherein said photon receiving device is comprised of at least one of a bipolar transistor, a forward biased diode, a reverse biased diode, an avalanche diode, an avalanche transistor and a field effect transistor.

14. The device of claim 1 , wherein said photon generating device is a diode and said photon receiving device is a bipolar transistor and wherein the device further comprises:

a P-doped region of said diode formed in said first isolated region;

a P-doped base region of said bipolar transistor formed in said second isolated region;

an N-doped emitter region formed within said P-doped base region of said bipolar transistor;

at least one conductive contact that is operatively coupled to said P-doped region of said diode; and

at least one conductive contact that is operatively coupled to said N-doped emitter region of said bipolar transistor.

15. The device of claim 1 , wherein said photon generating device is a diode and said photon receiving device is a bipolar transistor and wherein the device further comprises:

an N-doped region of said diode formed in said first isolated region;

an N-doped base region of said bipolar transistor formed in said second isolated region;

a P-doped emitter region formed within said N-doped base region of said bipolar transistor;

at least one conductive contact that is operatively coupled to said N-doped region of said diode; and

at least one conductive contact that is operatively coupled to said P-doped emitter region of said bipolar transistor.

16. The device of claim 1 , wherein the photon generating device comprises a vertical photon generating device.

17. The device of claim 16 , wherein the first isolated region includes silicon doped with ions of a first conductivity type, and the vertical photon generating device comprises a first doped region doped with ions having a second conductivity type different than the first conductivity type defined in the first isolated region.

18. The device of claim 1 , wherein the first isolated region includes silicon doped with ions of a first conductivity type, and the vertical photon receiving device comprises:

a first doped region doped with ions having a second conductivity type different than the first conductivity type defined in the first isolated region; and

a second doped region doped with ions having the first conductivity type defined in the first doped region.

19. A device, comprising:

a substrate comprised of a bulk layer of silicon, a buried insulation layer formed on said bulk silicon layer, and a doped layer of epitaxial silicon positioned above said buried insulating layer;

first and second isolated regions formed in said doped layer of epitaxial silicon;

a photon generating device formed in said first isolated region; and

a vertical photon receiving device formed in said second isolated region.

20. The device of claim 19 , wherein said first and second isolated regions are defined by a plurality of trench isolation regions.

21. The device of claim 20 , wherein said trench isolation regions extend through said doped layer of epitaxial silicon and contact said buried insulation layer.

22. The device of claim 19 , wherein said photon generating device is comprised of at least one of a diode, forward biased diode, a reverse biased diode and a bipolar transistor.

23. The device of claim 19 , wherein said photon receiving device is comprised of at least one of bipolar transistor, a forward biased diode, a reverse biased diode, an avalanche diode, an avalanche transistor and a field effect transistor.

24. The device of claim 19 , wherein said photon generating device is a diode and said photon receiving device is a bipolar transistor and wherein the device further comprises:

a P-doped region of said diode formed in said first isolated region;

a P-doped base region of said bipolar transistor formed in said second isolated region;

an N-doped emitter region formed within said P-doped base region of said bipolar transistor;

at least one conductive contact that is operatively coupled to said P-doped region of said diode; and

at least one conductive contact that is operatively coupled to said N-doped emitter region of said bipolar transistor.

25. The device of claim 19 , wherein said photon generating device is a diode and said photon receiving device is a bipolar transistor and wherein the device further comprises:

an N-doped region of said diode formed in said first isolated region;

an N-doped base region of said bipolar transistor formed in said second isolated region;

a P-doped emitter region formed within said N-doped base region of said bipolar transistor;

at least one conductive contact that is operatively coupled to said N-doped region of said diode; and

at least one conductive contact that is operatively coupled to said P-doped emitter region of said bipolar transistor.

26. The device of claim 19 , wherein the photon generating device comprises a vertical photon generating device.

27. The device of claim 26 , wherein the first isolated region includes silicon doped with ions of a first conductivity type, and the vertical photon generating device comprises a first doped region doped with ions having a second conductivity type different than the first conductivity type defined in the first isolated region.

28. The device of claim 19 , wherein the first isolated region includes silicon doped with ions of a first conductivity type, and the vertical photon receiving device comprises:

a first doped region doped with ions having a second conductivity type different than the first conductivity type defined in the first isolated region; and

a second doped region doped with ions having the first conductivity type defined in the first doped region.

29. A device, comprising:

a substrate comprised of a bulk layer of silicon, a buried insulation layer formed on said bulk silicon layer, and a doped layer of silicon in contact with said buried insulating layer;

first and second isolated regions formed in said doped layer of silicon;

a photon generating device formed in said first isolated region; and

a vertical photon receiving device formed in said second isolated region.

30. The device of claim 29 , wherein said first and second isolated regions are defined by a plurality of trench isolation regions.

31. The device of claim 30 , wherein said trench isolation regions extend through said doped layer of silicon and contact said buried insulation layer.

32. The device of claim 29 , wherein said photon generating device is comprised of at least one of a diode, forward biased diode, a reverse biased diode and a bipolar transistor.

33. The device of claim 29 , wherein said photon receiving device is comprised of at least one of bipolar transistor, a forward biased diode, a reverse biased diode, an avalanche diode, an avalanche transistor and a field effect transistor.

34. The device of claim 29 , wherein said photon generating device is a diode and said photon receiving device is a bipolar transistor and wherein the device further comprises:

a P-doped region of said diode formed in said first isolated region;

a P-doped base region of said bipolar transistor formed in said second isolated region;

an N-doped emitter region formed within said P-doped base region of said bipolar transistor;

at least one conductive contact that is operatively coupled to said P-doped region of said diode; and

at least one conductive contact that is operatively coupled to said N-doped emitter region of said bipolar transistor.

35. The device of claim 29 , wherein said photon generating device is a diode and said photon receiving device is a bipolar transistor and wherein the device further comprises:

an N-doped region of said diode formed in said first isolated region;

an N-doped base region of said bipolar transistor formed in said second isolated region;

a P-doped emitter region formed within said N-doped base region of said bipolar transistor;

at least one conductive contact that is operatively coupled to said N-doped region of said diode; and

at least one conductive contact that is operatively coupled to said P-doped emitter region of said bipolar transistor.

36. The device of claim 29 , wherein the photon generating device comprises a vertical photon generating device.

37. The device of claim 36 , wherein the first isolated region includes silicon doped with ions of a first conductivity type, and the vertical photon generating device comprises a first doped region doped with ions having a second conductivity type different than the first conductivity type defined in the first isolated region.

38. The device of claim 29 , wherein the first isolated region includes silicon doped with ions of a first conductivity type, and the vertical photon receiving device comprises:

a first doped region doped with ions having a second conductivity type different than the first conductivity type defined in the first isolated region; and

a second doped region doped with ions having the first conductivity type defined in the first doped region.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION; MICROSEMI FREQUENCY AND TIME CORPORATION, A DELAWARE CORPORATION; MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION), A DELAWARE CORPORATION; MICROSEMI CORP.-MEMORY AND STORAGE SOLUTIONS (F/K/A WHITE ELECTRONIC DESIGNS CORPORATION), AN INDIANA CORPORATION
Reel/Frame 037558/0711 →
PATENT SECURITY AGREEMENT Recorded Nov 26, 2013
From: MICROSEMI SEMICONDUCTOR (U.S.) INC.
To: MORGAN STANLEY & CO. LLC
Reel/Frame 031729/0667 →
MERGER Recorded Nov 18, 2013
From: LEGERITY, INC.
To: ZARLINK SEMICONDUCTOR (U.S.) INC.
Reel/Frame 031746/0171 →
CHANGE OF NAME Recorded Nov 18, 2013
From: ZARLINK SEMICONDUCTOR (U.S.) INC.
To: MICROSEMI SEMICONDUCTOR (U.S.) INC.
Reel/Frame 031746/0214 →