Shared storage arbitration
View Patent ↗The invention provides an arbitration unit adapted for controlling accesses to a shared storage. The arbitration unit comprises a set of interfaces adapted for connecting a plurality of units with said arbitration unit, wherein outgoing data streams are transmitted from the arbitration unit via respective ones of said interfaces to at least one of said units, and wherein incoming data streams are transmitted from at least one of said units via respective ones of said interfaces to the arbitration unit. A control logic is connected to each of said interfaces, said control logic being adapted for segmenting write data of incoming data streams in order to set up write accesses to said shared storage, for scheduling a sequence of at least one of write and read accesses to said shared storage, and for distributing read data obtained during said read accesses to outgoing data streams.
1. A channel for use in an automated test equipment, said channel comprising:
a storage unit with an arbitration unit adapted for controlling accesses to a shared storage, said arbitration unit comprising:
a set of interfaces adapted for connecting a plurality of units with said arbitration unit, wherein outgoing data streams are transmitted from the arbitration unit via respective ones of said interfaces to at least one of said units, and wherein incoming data streams are transmitted from at least one of said units via respective ones of said interfaces to the arbitration unit, and
a control logic that is connected to each of said interfaces, said control unit being adapted for segmenting write data of incoming data streams in order to set up write accesses to said shared storage, for scheduling a sequence of at least one of write and read accesses to said shared storage, and for distributing read data obtained during said read accesses to outgoing data streams;
a sequencer adapted for reading data from said storage unit, and for providing stimulus data to at least one DUT; and
a result-processing unit adapted for evaluating result data obtained from said at least one DUT, and for writing data to said storage unit.
2. The channel of claim 1 , further comprising an interface module adapted for establishing a data link between the channel and a central facility.
3. An automated test equipment adapted for testing at least one DUT, said automated test equipment comprising:
at least one channel according to claim 1 , and
a central facility adapted for coordinating said at least one channel.
4. The channel of claim 1 , wherein at least one of said interfaces comprises at least one buffer, preferably at least one FIFO buffer, that is adapted for buffering one or more of the incoming and outgoing data streams.
5. The channel of claim 1 , wherein each of said interfaces is connected to a respective one of said units.
6. The channel of claim 1 , wherein at least one of said units is adapted for transmitting at least one of write requests or read requests to the storage unit, wherein at least one write request indicates a start address and a size of the data block that is to be written to said shared storage, and wherein at least one read request indicates a start address and a size of the data block that is to be read from said shared storage.
7. The channel of claim 1 , wherein said control logic is adapted for scheduling said read accesses and said write accesses based on priorities that are assigned to at least some of the various interfaces, or to at least some of the various incoming and outgoing data streams.
8. The channel of claim 7 , wherein said control logic is adapted for modifying said priorities in a way that the amount of switching from write to read, or vice versa, is kept small.
9. The channel of claim 7 , wherein said control logic is adapted for modifying said priorities in a way that a continuous transmission of at least one of said data streams is promoted.
10. The channel of claim 7 , wherein said control logic is adapted for modifying said priorities in a way that the higher the fill level of a buffer gets, the higher the priority of the corresponding buffered data stream will become.
11. The channel of claim 1 , wherein said control logic is adapted for assigning a high priority to an outgoing data stream that comprises instructions for said sequencer.
12. The channel of claim 1 , wherein said storage unit is adapted for receiving an incoming data stream from said result processing unit, said incoming data stream comprising result data that is to be written to said shared storage.
13. The channel of claim 1 , wherein said storage unit is adapted for exchanging data streams with said interface module, wherein a high priority is assigned to said data streams.
14. The channel of claim 1 , wherein said shared storage is a Random Access Memory.
15. The channel of claim 1 , wherein said control logic is adapted for considering a low latency of an incoming or outgoing data stream by assigning a correspondingly high priority to the respective data stream.
16. The channel of claim 14 , wherein said Random Access Memory is a Dynamic Random Access Memory.
17. The channel t of claim 1 , further comprising a memory maintenance unit adapted for providing maintenance requests to said shared storage.