Patent Assignment
Reel/Frame 019015/0119
Assignment of Assignor's Interest
Recorded: 2007-03-14
Pages: 11
Assignor
AGILENT TECHNOLOGIES, INC.
Executed: 2007-03-06
Assignee
VERIGY (SINGAPORE) PTE. LTD.
NO. 1 YISHUN AVE. 7, 768923, SINGAPORE
Covered Properties
(158)
Data flow synchronization
Application:
10/032,513 →
Publication:
US 2002/0141525
System and Method for Testing Circuitry on a Wafer
Reconstruction of Non-Deterministic Algorithmic Tester Stimulus Used as Input to a Device Under Test
Calibration Method for Interleaving an a/D Converter
Electrical System Like a Testing System for Testing the Channels of a Communication System
System and Method for Testing Circuitry Using an Externally Generated Signature
Delay Management System
Systems and Methods for Injection of Test Jitter in Data Bit-Streams
Method for guaranteeing stable non-linear PLLs
Application:
10/414,791 →
Publication:
US 2004/0208274
System and Method for Configuring Capabilities of Printed Circuit Boards
System and Method for Improved Controlled Airflow Within a Vacuum Booster System
Systems and Methods for Testing a Device-Under-Test
Modeling an Electronic Device
Transition Tracking
Methods and systems for determining memory requirements for device testing
Application:
10/666,024 →
Publication:
US 2005/0066248
Method and System for Graphical Pin Assignment and/or Verification
Cost Estimation for Device Testing
Electronic licensing for device tester
Application:
10/684,281 →
Publication:
US 2005/0080745
Device Testing Control
Data sampling
Application:
10/688,393 →
Publication:
US 2004/0158438
Method and apparatus for detecting and correcting invalid test definition data
Application:
10/722,183 →
Publication:
US 2005/0114066
Systems and Methods for Adaptively Compressing Test Data
Instrument Rack with Direct Exhaustion
Color key presentation for a graphical user interface
Application:
10/782,983 →
Publication:
US 2005/0188332
Highlighting panning window interface
Application:
10/782,985 →
Publication:
US 2005/0188325
Wireless No-Touch Testing of Integrated Circuits
Multiple Clocks with Superperiod
Printed Circuit Board with Improved Cooling of Electrical Component
Parameterized Signal Conditioning
Systems and Methods for Processing Automatically Generated Test Patterns
Provisioning and Use of Security Tokens to Enable Automated Test Equipment
Shared Storage Arbitration
Apparatus, System and/or Method for Combining Multiple Tests to a Single Test in a Multiple Independent Port Test Environment
Transfer Clocks for a Multi-Channel Architecture
Methods and apparatus that use contextual test number factors to assign test numbers
Application:
10/839,824 →
Publication:
US 2006/0004859
Method and Apparatus for Assigning Test Numbers
Methods and Apparatus for Handling Test Number Collisions
Method, Apparatus and Database Using a Map of Linked Data Nodes for Storing Test Numbers
Methods and Apparatus That Use Contextual Test Number Factors to Assign Test Numbers
Coaxial Dc Block
An Electrical Test Circuit with an Active-Load and an Output Sampling Capability
Heat transmission member and an electronics device using the member
Application:
10/885,214 →
Publication:
US 2005/0039879
Sequencer Unit with Instruction Buffering
Methods and apparatus for providing automated test equipment with a means to jump and return in a test program
Application:
10/899,759 →
Publication:
US 2006/0020413
License proxy process to facilitate license sharing between a plurality of applications
Application:
10/899,760 →
Publication:
US 2006/0020553
Application and license proxy process using shared memory
Application:
10/899,832 →
Publication:
US 2006/0031170
License proxy
Application:
10/899,969 →
Publication:
US 2006/0020554
Methods and apparatus for providing automated test equipment with a means to jump between tests in a test program
Application:
10/899,970 →
Publication:
US 2006/0020920
Monitoring a License Proxy
Application:
10/899,975 →
Publication:
US 2006/0020555
Method and Apparatus for Electromagnetic Interference Shielding in an Automated Test System
Spectral jitter analysis allowing jitter modulation waveform analysis
Application:
10/911,204 →
Publication:
US 2005/0075810
Channel with Domain Crossing
Low Distortion Variable Gain and Rooting Amplifier with Solid State Relay
Construction and Use of Dielectric Plate for Mating Test Equipment to a Load Board of a Circuit Tester
Device driving method, and a device driving apparatus, a signal switching apparatus
Application:
10/930,250 →
Publication:
US 2005/0094337
Calibration Method of Time Measurement Apparatus
Method and Apparatus for Determining Which of Two Computer Processes Should Perform a Function X
Data transmission method and a data transmission apparatus between ground-isolated apparatuses
Application:
10/946,769 →
Publication:
US 2005/0089088
Methods and Apparatus for Providing Scan Patterns to an Electronic Device
Methods and Apparatus for Programming and Operating Automated Test Equipment
Application of Paging to a Dataset, Graphical Display Window and Graphical Scrollbar Grip
System, Method and Apparatus for Providing Ground Separation Between Different Environments
Mock Wafer, System Calibrated Using Mock Wafer, and Method for Calibrating Automated Test Equipment
Method and Apparatus for Generating a Phase-Locked Output Signal
Method and Apparatus for Variable Sigma-Delta Modulation
Systems and Methods of Allocating Device Testing Resources to Sites of a Probe Card
Incremental Generation of Calibration Factors for Automated Test Equipment
Clamp and Method for Operating Same
Module with trigger bus for SOC tester and a method of timing calibration in the module
Application:
11/050,581 →
Publication:
US 2005/0210332
Direct Access to Content and Services Available on an Entertainment System
Method and Apparatus for Quantifying the Timing Error Induced by Crosstalk Between Signal Paths
Method and Apparatus for Quantifying the Timing Error Induced by an Impedance Variation of a Signal Path
Compilation of Calibration Information for Plural Testflows
Device for Releasable Connecting an Interface with a Test Equipment
Model Based Testing for Electronic Devices
Method and apparatus for non-contact cleaning of electronics
Application:
11/113,790 →
Publication:
US 2006/0236495
Fluid Sampling Device, Tubular Sampling Coupon, and System and Method for Sampling Equipment and Fluid Conditions
Pin Coupler for an Integrated Circuit Tester
Using a Leaf Spring to Attach Clamp Plates with a Heat Sink to Both Sides of a Component Mounted on a Printed Circuit Assembly
Model-based pre-assembly testing of multi-component production devices
Application:
11/139,152 →
Publication:
US 2006/0155520
Channel Switching Circuit
Power Amplifying Apparatus
Precision Pulse Placement to Form a Binary Pulse Signal
Reprogramming of tester resource assignments
Application:
11/153,180 →
Publication:
US 2007/0011544
Method and System for Per-Pin Clock Synthesis of an Electronic Device Under Test
Fast Synchronization of a Number of Digital Clocks
Systems, Methods and Computer Programs for Calibrating an Automated Circuit Test System
Method and apparatus that provide for configuration of hardware resources specified in a test template
Application:
11/169,541 →
Publication:
US 2007/0022351
Methods and Apparatus Using a Hierarchical Test Development Tree to Specify Devices and Their Test Setups
Application:
11/170,374 →
Publication:
US 2007/0006038
Test apparatus with tester channel availability identification
Application:
11/176,928 →
Publication:
US 2007/0022349
System, method and viewer program to display a chart of current array values for an array data set
Application:
11/178,546 →
Publication:
US 2007/0011657
Thermal sheet having higher flexibility and higher heat conductivity
Application:
11/187,509 →
Publication:
US 2006/0035069
Analog Signal Generation Using a Delta-Sigma Modulator
Self Contained, Liquid to Air Cooled, Memory Test Engineering Workstation
Data Converter with Integrated Mems Resonator Clock
Source Synchronous Sampling
Carousel Device, System and Method for Electronic Circuit Tester
Zero Insertion Force Printed Circuit Assembly Connector System and Method
Patent:
7,147,499 →
Application:
11/253,446 →
Method and apparatus for a DUT contactor
Application:
11/257,143 →
Publication:
US 2007/0090849
Waterblock for cooling electrical and electronic circuitry
Application:
11/257,669 →
Publication:
US 2007/0089858
Method and Apparatus for Eliminating Automated Testing Equipment Index Time
Resource Matrix, System, and Method for Operating Same
Software program with alternative function libraries
Application:
11/287,819 →
Publication:
US 2007/0169026
System-On-A-Chip Pipeline Tester and Method
Method and apparatus for testing integrated circuits over a range of temperatures
Application:
11/300,545 →
Publication:
US 2007/0132471
Pin Connector
Estimating Boundaries of Schmoo Plots
Apparatus for Storing and Formatting Data
Method and System for Managing Access to a Data Store with a Primary Thread and Secondary Threads
Application:
11/345,041 →
Publication:
US 2007/0180200
Data tree structure for automatic retention of context information
Application:
11/345,042 →
Publication:
US 2007/0192080
Method and System for Prioritizing Formatting Actions of a Number of Data Formatters
Method for Configuring a Data Formatting Process Using Configuration Values of a Highest Priority for Each of a Number of Configuration Keys Storing in Several Configuration Layers
Method and Machine-Readable Media for Inferring Relationships Between Test Results
Methods and apparatus for storing and formatting data
Application:
11/345,048 →
Publication:
US 2007/0179970
Methods and Apparatus Using a Service to Launch and/or Monitor Data Formatting Processes
Methods and Systems for Derivation of Missing Data Objects from Test Data
Apparatus for storing variable values to provide context for test results that are to be formatted
Application:
11/345,196 →
Publication:
US 2007/0192346
Method and System for Selectively Processing Test Data Using Subscriptions in a Multi-Formatter Architecture
Systems and Methods for Accumulation of Summaries of Test Data
Method and apparatus for automatically formatting data based on a best match test result type
Application:
11/345,209 →
Publication:
US 2007/0180369
Handling Mixed-Mode Content in a Stream of Test Results
Application:
11/345,210 →
Publication:
US 2007/0180339
System, Method and Apparatus for Completing the Generation of Test Records After an Abort Event
Excitation Signal Generator for Improved Accuracy of Model-Based Testing
Testing a Device Under Test by Sampling Its Clock and Data Signal
Asynchronous Digital Data Capture
Self-Repair System and Method for Providing Resource Failure Tolerance
Test System and Method for Testing Electronic Devices Using a Pipelined Testing Architecture
Memory Device Fail Summary Data Reduction for Improved Redundancy Analysis
Method and Apparatus for Determining Which Timing Sets to Pre-Load into the Pin Electronics of a Circuit Test System, and for Pre-Loading or Storing Said Timing Sets
Pin Electronic for Automatic Testing of Integrated Circuits
Apparatus for, and method of, positioning an interface unit of an automatic test system
Application:
11/366,773 →
Publication:
US 2007/0213847
Memory Device Fail Summary Data Reduction for Improved Redundancy Analysis
Graphical presentation of semiconductor test results
Application:
11/385,438 →
Publication:
US 2007/0226555
Inexpensive low phase noise high speed stabilized time base
Application:
11/385,963 →
Publication:
US 2007/0236301
Calibration Apparatus and Method Using Pulse for Frequency, Phase, and Delay Characteristic
Analog to Digital Conversion Method Using Track/Hold Circuit and Time Interval Analyzer, and an Apparatus Using the Method
Systems, Methods and Apparatus for Synthesizing State Events for a Test Data Stream
Methods and instructions for outputting data comprising a data dictionary
Application:
11/400,573 →
Publication:
US 2007/0239436
Event log management system
Application:
11/402,113 →
Publication:
US 2007/0260932
Systems and methods for assigning identifiers to test results for devices within a group
Application:
11/404,144 →
Publication:
US 2007/0260936
Systems and methods for selectively logging test data
Application:
11/404,145 →
Publication:
US 2007/0260937
System, method and apparatus for generating a formatted data set
Application:
11/404,545 →
Publication:
US 2007/0244913
Method for Test of Electronic Component
Apparatus, Systems and Methods for Processing Signals Between a Tester and a Plurality of Devices Under Test at High Temperatures and with Single Touchdown of a Probe Array
Method, code, and apparatus for logging test results
Application:
11/410,741 →
Publication:
US 2007/0260938
Graphically Extensible, Hardware Independent Method to Inspect and Modify State of Test Equipment
Re-Configurable Architecture for Automated Test Equipment
Modular code generation
Application:
11/435,587 →
Publication:
US 2007/0006188
Circuit board with a cooling architecture
Application:
11/436,754 →
Publication:
US 2007/0030657
Mapping Logic for Controlling Loading of the Select Ram of an Error Data Crossbar Multiplexer
Method and Apparatus for a Paddle Board Probe Card
Method and apparatus for a high frequency coaxial through hole via in multilayer printed circuit boards
Application:
11/444,943 →
Publication:
US 2007/0278001
Method and apparatus for a low thermal impedance printed circuit board assembly
Application:
11/445,031 →
Publication:
US 2007/0278002
Method for Adjusting Signal Generator and Signal Generator
Method and System for Digital to Analog Conversion Using Multi-Purpose Current Summation
Digital to Analog Conversion Using Summation of Multiple Dacs
Method and an apparatus for frequency measurement
Application:
11/518,463 →
Publication:
US 2007/0079180
Method and an Apparatus for Measuring the Input Threshold Level of Device Under Test
Related Assignments
(15)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Nov 25, 2003
From: AGILENT TECHNOLOGIES DEUTSCHLAND, GMBH
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 014745/0983 →
Assignment of Assignor's Interest
Dec 15, 2003
From: AGILENT TECHNOLOGIES DEUTSCHLAND GMBH
To: AGILENT TECHNOLOGIES INC.
Reel/Frame 014783/0469 →
Assignment of Assignor's Interest
Jan 7, 2004
From: HILDEBRANT, ANDREW S.; HAYHOW, REID F.
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 014241/0315 →
Assignment of Assignor's Interest
Jan 7, 2004
From: KOLMAN, ROBERT S.
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 014237/0474 →
Assignment of Assignor's Interest
Jan 21, 2004
From: HAYHOW, REID F.
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 014275/0058 →
Assignment of Assignor's Interest
Jan 21, 2004
From: HAYHOW, REID
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 014274/0570 →
Assignment of Assignor's Interest
Jan 29, 2004
From: HAYHOW, REID
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 014290/0874 →
Assignment of Assignor's Interest
Aug 27, 2010
From: DELPHI AUTOMOTIVE SYSTEMS, LLC
To: BWI COMPANY LIMITED S.A.
Reel/Frame 024892/0813 →
Assignment of Assignor's Interest
Mar 20, 2012
From: VERIGY (SINGAPORE) PTE LTD
To: ADVANTEST (SINGAPORE) PTE LTD
Reel/Frame 027896/0018 →
Assignment of Assignor's Interest
Apr 6, 2015
From: ADVANTEST (SINGAPORE) PTE. LTD.
To: ADVANTEST CORPORATION
Reel/Frame 035371/0265 →
Corrective Assignment to Correct the Assignee Address Previously Recorded at Reel: 035371 Frame: 0265. Assignor(S) Hereby Confirms the Assignment.
Apr 14, 2015
From: ADVANTEST (SINGAPORE) PTE. LTD.
To: ADVANTEST CORPORATION
Reel/Frame 035425/0768 →
Change of Address
Dec 18, 2018
From: ADVANTEST CORPORATION
To: ADVANTEST CORPORATION
Reel/Frame 047987/0626 →
Change of Address
May 31, 2022
From: BWI COMPANY LIMITED S.A.
To: BWI COMPANY LIMITED S.A.
Reel/Frame 060219/0838 →
Assignment of Assignor's Interest
May 31, 2022
From: BWI COMPANY LIMITED S.A.
To: CHANGZHOU BWI AUTOMOTIVE ELECTRONIC TECHNOLOGY CO.,LTD
Reel/Frame 060053/0358 →
Assignment of Assignor's Interest
Jan 7, 2025
From: VIVINT, INC.
To: VIVINT LLC
Reel/Frame 069767/0077 →