Systems and methods for adaptively compressing test data
View Patent ↗Systems and methods for adaptively compressing test data are disclosed. One such method comprises the steps of examining a test data file that includes a first plurality of data units corresponding to a first plurality of DUT pins and a second plurality of data units corresponding to a second plurality of DUT pins, compressing the first plurality of data units using a first compression technique, and compressing the second plurality of data units using a second compression technique.
1. A method for adaptively compressing test data to be provided to a device under test (DUT), the method comprising the steps of:
examining a test data file that includes test data configured to enable testing the DUT, the test data file including a first plurality of data units and a second plurality of data units, the first plurality of data units corresponding to a first plurality of DUT pins, and the second plurality of data units corresponding to a second plurality of DUT pins, wherein the first plurality of DUT pins are clock-pins and the second plurality of DUT pins are non-clock-pins;
determining that the first plurality of data units have a first compressibility characteristic; and
determining that the second plurality of data units have a second compressibility characteristic.
2. The method of claim 1 , further comprising the step of: compressing the first plurality of data units independently from the second plurality of data units.
3. The method of claim 1 , wherein the test data file is one of a STIL (standard test interface language) file and a WGL (waveform generation language) file.
4. The method of claim 1 , wherein the first plurality of data units have a different timing complexity, a different vector data volume, and more repetitive data patterns than the second plurality of data units.
5. A system for adaptively compressing test data to be provided to a device under test (DUT), the system comprising:
memory configured to store a test data file that includes test data configured to enable testing the DUT, the test data file including a first plurality of data units and a second plurality of data units, the first plurality of data units corresponding to a first plurality of DUT pins, and the second plurality of data units corresponding to a second plurality of DUT pins, wherein the first plurality of DUT pins are clock-pins and the second plurality of DUT pins are non-clock-pins; and
a processor that is operative to:
determine that the first plurality of data units have a first compressibility characteristic;
determine that the second plurality of data units have a second compressibility characteristic.
6. The system of claim 5 , wherein the processor is operative to:
compress the first plurality of data units independently from the second plurality of data units.
7. The system of claim 5 , wherein the test data file is one of a STIL (standard test interface language) file and a WGL (waveform generation language) file.
8. The system of claim 5 , wherein the first plurality of data units have a different timing complexity, a different vector data volume, and more repetitive data patterns than the second plurality of data unit.