IP Library Granted Patent US 8,769,361
Granted Patent B2
US 8,769,361 · App. 10/681,068 · Granted Jul 1, 2014

Cost estimation for device testing

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Quick Facts
Patent No.
US 8,769,361
App. No.
10/681,068
Granted
Jul 1, 2014
Kind
B2
Abstract

Methods and systems for estimating cost for device testing are disclosed. In one embodiment, the method comprises reading a test file having a plurality of test vectors, determining a required memory needed to execute the plurality of test vectors, and using the required memory to estimate a cost to execute the test vectors.

Claims (39)

1. A machine-executable method comprising:

executing sequences of instructions on a machine, the executed sequences of instructions causing the machine to perform the actions of,

reading a test file having a plurality of test vectors;

determining a required memory needed to execute the plurality of test vectors; and

using the required memory to estimate a cost to execute the test vectors.

2. The method of claim 1 , wherein the executed sequences of instructions further cause the machine to perform the action of receiving a billing scheme; wherein using the required memory to estimate a cost includes using the billing scheme to estimate the cost to execute the test vectors.

3. The method of claim 1 , wherein determining a required memory comprises determining a required memory needed for each of a plurality of boards of a tester to execute the test vectors for the board.

4. The method of claim 1 , wherein determining a required memory comprises determining a required memory needed for each of a plurality of pins of a tester to execute the test vectors for the pin.

5. The method of claim 1 , wherein determining a required memory comprises counting the number of test vectors for each of one or more tests in the test file.

6. The method of claim 1 , wherein determining a required memory comprises:

determining a first memory requirement needed for a first pin of a tester to execute the test vectors for a first test in the test file;

setting the required memory equal to the first memory requirement; and

for each additional pin of the tester,

determining a second memory requirement needed for the additional pin to execute the test vectors for the first test; and

if the second memory requirement is greater than the first memory requirement, setting the required memory equal to the second memory requirement.

7. The method of claim 6 , wherein the executed sequences of instructions further cause the machine to perform the action of, for each additional test in the test file:

for each pin of the tester, determining a third memory requirement for the pin to execute the test vectors for the additional test; and setting the required memory equal to the third memory requirement if the third memory requirement is greater than the required memory.

8. A system comprising:

a machine programmed to execute sequences of instructions, wherein execution of the sequences of instructions defines,

logic to read a test file having a plurality of test vectors and to determine a required memory needed to execute the plurality of test vectors; and

a billing predictor, communicatively coupled to the logic, to use the required memory to estimate a cost to execute the test vectors.

9. The system of claim 8 , wherein the machine further comprises a user interface to display the cost to a user.

10. The system of claim 8 , further comprising a tester having a plurality of boards; wherein the logic is to determine a required memory needed for each board of the tester to execute the test vectors for the board.

11. The system of claim 8 , further comprising a tester having a plurality of boards, each board including a plurality of pins;

wherein the logic is to determine a required memory needed for each pin to execute the test vectors for the pin.

12. The system of claim 8 , wherein the logic is to determine the required memory by counting the number of test vectors for each test in the test file.

13. One or more machine-readable mediums having stored thereon sequences of instructions, which, when executed by a machine, cause the machine to perform the actions:

reading a test file having a plurality of test vectors;

determining a required memory needed to execute the plurality of test vectors; and

using the required memory to estimate a cost to execute the test vectors.

14. The machine-readable mediums of claim 13 , further comprising instructions, which when executed by the machine, cause the machine to perform the actions of receiving a billing scheme; and wherein the instructions for using the required memory to estimate a cost include instructions, which when executed by the machine, cause the machine to perform the actions of using the billing scheme to estimate the cost to execute the test vectors.

15. The machine-readable mediums of claim 13 , wherein the instructions for determining a required memory comprise instructions, which when executed by the machine, cause the machine to perform the actions of determining a required memory needed for each of a plurality of boards of a tester to execute the test vectors for the board.

16. The machine-readable mediums of claim 13 , wherein the instructions for determining a required memory comprise instructions, which when executed by the machine, cause the machine to perform the actions of determining a required memory needed for each of a plurality of pins of a tester to execute the test vectors for the pin.

17. The machine-readable mediums of claim 13 , wherein the instructions for determining a required memory comprise instructions, which when executed by the machine, cause the machine to perform the actions:

determining a first memory requirement needed for a first pin of a tester to execute the test vectors for a first test in the test file;

setting the required memory equal to the first memory requirement; and

for each additional pin of the tester,

determining a second memory requirement needed for the additional pin to execute the test vectors for the first test; and

if the second memory requirement is greater than the first memory requirement, setting the required memory equal to the second memory requirement.

Assignments (6)
CHANGE OF ADDRESS Recorded Dec 18, 2018
From: ADVANTEST CORPORATION
To: ADVANTEST CORPORATION
Reel/Frame 047987/0626 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE ADDRESS PREVIOUSLY RECORDED AT REEL: 035371 FRAME: 0265. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 14, 2015
From: ADVANTEST (SINGAPORE) PTE. LTD.
To: ADVANTEST CORPORATION
Reel/Frame 035425/0768 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2015
From: ADVANTEST (SINGAPORE) PTE. LTD.
To: ADVANTEST CORPORATION
Reel/Frame 035371/0265 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2012
From: VERIGY (SINGAPORE) PTE LTD
To: ADVANTEST (SINGAPORE) PTE LTD
Reel/Frame 027896/0018 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2007
From: AGILENT TECHNOLOGIES, INC.
To: VERIGY (SINGAPORE) PTE. LTD.
Reel/Frame 019015/0119 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2004
From: HILDEBRANT, ANDREW S.; HAYHOW, REID F.
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 014241/0315 →