Method and apparatus for eliminating automated testing equipment index time
View Patent ↗The present invention eliminates the indexing time of an SOC tester, or at least reduces it to the time delay for an electronic switch to toggle or a mechanical shift to occur between two banks of DUTs to be tested on a DUT load board mounted on a test head.
1. An SOC tester system comprising:
a test head;
a DUT load board with a first bank of DUT test locations and a second bank of DUT test locations, the DUT load board being mounted on and electrically connected to the test head;
a handler, wherein the test head tests a first bank of DUTs in the first bank of DUT test locations while the handler removes DUTs from and inserts DUTs into the second bank of DUT test locations; and
a mechanical switch providing a mechanical shift in alignment of the first bank of DUT test locations and the second bank of DUT test locations that switches between testing the first bank of DUT test locations and the second bank of DUT test locations.
2. The SOC tester system according to claim 1 , further comprising a switch that switches the handler between handling the first bank of DUTs in the first bank of DUT test locations and the second bank of DUTs in the second bank of DUT test locations.
3. An SOC tester DUT load board comprising:
a first bank of SOC DUT test locations;
a second bank of SOC DUT test locations; and
a mechanical switch providing a mechanical shift for switching alignment of tester pins between the first and second banks of test locations.
4. A method for testing devices in an SOC tester comprising the following steps:
loading a first set of devices into a first bank of DUT test locations on a DUT load board mounted on a test head;
testing the first set of devices, while simultaneously loading a second set of devices into a second bank of DUT test locations on the DUT load board mounted on the test head;
mechanically switching alignment of test locations from the first bank of DUT test locations to the second bank of DUT test locations and testing the second set of devices, while simultaneously unloading the first set of devices and loading a third set of devices into the first bank of DUT test locations on the DUT load board mounted on the test head.
5. A method for testing devices in an SOC tester comprising the following steps:
testing a first set of devices in a first bank of DUT test locations on a DUT load board mounted on a test head, while simultaneously loadings second set of devices into a second bank of DUT test locations on the DUT load board mounted on the test head;
mechanically switching alignment of test locations from the first bank of DUT test locations to the second bank of DUT test locations;
testing the second set of devices in the second bank of DUT test locations on the DUT load board mounted on the test head, while simultaneously unloading the first set of devices from the first bank of DUT test locations on the DUT load board and loading a third set of devices onto the first bank of DUT test locations on the DUT load board.