Semiconductor device and method of manufacturing the same
View Patent ↗A semiconductor device includes a semiconductor construction assembly having a semiconductor substrate which has first and second surfaces, and has an integrated circuit element formed on the first surface, a plurality of connection pads which are connected to the integrated circuit element, a protective layer which covers the semiconductor substrate and has openings for exposing the connection pads, and conductors which are connected to the connection pads, arranged on the protective layer, and have pads. An upper insulating layer covers the entire upper surface of the semiconductor construction assembly including the conductors except the pads. A sealing member covers at least one side surface of the semiconductor construction assembly. An upper conductors is formed on the upper insulating layer, and has one ends electrically connected to the pads and an external connection pads, respectively, an external connection pad of at least one of the upper conductors being disposed in a region corresponding to the sealing member.
1. A semiconductor device comprising:
a semiconductor construction assembly including: (i) a semiconductor substrate having first and second surfaces that are mutually opposed to each other, and a plurality of side surfaces between the first surface and the second surface, (ii) an integrated circuit element formed on the first surface, (iii) a plurality of connection pads which are arranged on the first surface and connected to the integrated circuit element, (iv) a protective layer which is formed to cover the first surface of the semiconductor substrate and which has openings for exposing the connection pads, (v) a plurality of conductors which are connected to the connection pads and arranged on the protective layer and which have pads, (vi) columnar electrodes formed on the pads of the conductors, and (vii) a sealing film formed between the columnar electrodes and on the protective layer;
a sealing member which covers at least one side surface of the semiconductor construction assembly;
an upper insulating layer which covers the semiconductor construction assembly and the sealing member except for portions corresponding to the columnar electrodes so as to expose an upper surface of each of the columnar electrodes;
upper conductors which are formed on the upper insulating layer, and each of which includes one end that is electrically connected to the pad of one of the conductors via one of the columnar electrodes and at least one external connection pad;
wherein an external connection pad of at least one of the upper conductors is disposed in a region opposing the sealing member; and
wherein an additional insulating layer made of an inorganic material is formed between the semiconductor substrate and the protective layer of the semiconductor construction assembly.
2. A semiconductor device according to claim 1 , wherein upper surfaces of the sealing member and the semiconductor construction assembly are substantially flush with each other.
3. A semiconductor device according to claim 1 , wherein lower surfaces of the sealing member and the semiconductor construction assembly are substantially flush with each other.
4. A semiconductor device according to claim 1 , further comprising a base member which holds the semiconductor construction assembly and the sealing member.
5. A semiconductor device according to claim 1 , further comprising at least one electrical connection member which is electrically connected to at least one of the upper conductors, and which extends vertically through the sealing member from an upper surface of the sealing member to a lower surface of the sealing member.
6. A semiconductor device comprising:
a semiconductor construction assembly including: (i) a semiconductor substrate having first and second surfaces that are mutually opposed to each other, and a plurality of side surfaces between the first surface and the second surface, (ii) an integrated circuit element formed on the first surface, (iii) a plurality of connection pads which are arranged on the first surface and connected to the integrated circuit element, (iv) a protective layer which is formed to cover the first surface of the semiconductor substrate and which has openings for exposing the connection pads, (v) a plurality of conductors which are connected to the connection pads and arranged on the protective layer and which have pads, (vi) columnar electrodes formed on the pads of the conductors, and (vii) a sealing film formed between the columnar electrodes and on the protective layer;
a sealing member which covers at least one side surface of the semiconductor construction assembly;
an upper insulating layer which covers the semiconductor construction assembly and the sealing member except for portions corresponding to the columnar electrodes so as to expose an upper surface of each of the columnar electrodes; and
upper conductors which are formed on the upper insulating layer, and each of which includes one end that is electrically connected to the pad of one of the conductors via one of the columnar electrodes and at least one external connection pad;
wherein an external connection pad of at least one of the upper conductors is disposed in a region opposing the sealing member; and
wherein the sealing member comprises a buried member, and the buried member has substantially a same thickness as a thickness of the semiconductor construction assembly.
7. A semiconductor device according to claim 6 , wherein a further insulating material is filled between the buried member and the semiconductor construction assembly.
8. A semiconductor device according to claim 6 , wherein an additional insulating layer made of an inorganic material is formed between the semiconductor substrate and the protective layer of the semiconductor construction assembly.
9. A semiconductor device according to claim 6 , wherein upper surfaces of the sealing member and the semiconductor construction assembly are substantially flush with each other.
10. A semiconductor device according to claim 6 , wherein lower surfaces of the sealing member and the semiconductor construction assembly are substantially flush with each other.
11. A semiconductor device according to claim 6 , further comprising a base member which holds the semiconductor construction assembly and the sealing member.
12. A semiconductor device comprising:
a semiconductor construction assembly including: (i) a semiconductor substrate having first and second surfaces that are mutually opposed to each other, and a plurality of side surfaces between the first surface and the second surface, (ii) an integrated circuit element formed on the first surface, (iii) a plurality of connection pads which are arranged on the first surface and connected to the integrated circuit element, (iv) a protective layer which is formed to cover the first surface of the semiconductor substrate and which has openings for exposing the connection pads, (v) a plurality of conductors which are connected to the connection pads and arranged on the protective layer and which have pads, (vi) columnar electrodes formed on the pads of the conductors, and (vii) a sealing film formed between the columnar electrodes and on the protective layer;
a sealing member which covers at least one side surface of the semiconductor construction assembly;
an upper insulating layer which covers the semiconductor construction assembly and the sealing member except for portions corresponding to the columnar electrodes so as to expose an upper surface of each of the columnar electrodes;
upper conductors which are formed above the upper insulating layer, and each of which includes one end that is electrically connected to the pad of one of the conductors via one of the columnar electrodes and at least one external connection pad;
interlayer conductors, which are arranged between the upper conductors and the semiconductor construction assembly and which connect the columnar electrodes of the semiconductor construction assembly to the corresponding upper conductors; and
an interlayer dielectric layer which covers the interlayer conductors;
wherein an external connection pad of at least one of the upper conductors is disposed in a region opposing the sealing member.
13. A semiconductor device according to claim 12 , wherein an uppermost insulating layer is arranged on an upper surface of the interlayer dielectric layer and on the upper conductors and does not cover the external connection pads of the upper conductors.
14. A semiconductor device according to claim 13 , further comprising projecting connection terminals arranged on the external connection pads of the upper conductors.
15. A semiconductor device according to claim 14 , wherein each of the projecting connection terminals comprises a solder ball.
16. A semiconductor device according to claim 13 , wherein at least one electronic component which is electrically connected to at least one of the external connection pads is arranged on the uppermost insulating layer.
17. A semiconductor device according to claim 13 , wherein at least one connection pin is arranged on at least one of the external connection pads.
18. A semiconductor device according to claim 12 , wherein an additional insulating layer made of an inorganic material is formed between the semiconductor substrate and the protective layer of the semiconductor construction assembly.
19. A semiconductor device according to claim 12 , wherein upper surfaces of the sealing member and the semiconductor construction assembly are substantially flush with each other.
20. A semiconductor device according to claim 12 , wherein lower surfaces of the sealing member and the semiconductor construction assembly are substantially flush with each other.
21. A semiconductor device according to claim 12 , further comprising a base member which holds the semiconductor construction assembly and the sealing member.
22. A semiconductor device according to claim 12 , wherein the upper conductors are provided on the interlayer dielectric layer.
23. A semiconductor device comprising:
a semiconductor construction assembly including: (i) a semiconductor substrate having first and second surfaces that are mutually opposed to each other, and a plurality of side surfaces between the first surface and the second surface, (ii) an integrated circuit element formed on the first surface, (iii) a plurality of connection pads which are arranged on the first surface and connected to the integrated circuit element, (iv) a protective layer which is formed to cover the first surface of the semiconductor substrate and which has openings for exposing the connection pads, (v) a plurality of conductors which are connected to the connection pads and arranged on the protective layer and which have pads, (vi) columnar electrodes formed on the pads of the conductors, and (vii) a sealing film formed between the columnar electrodes and on the protective layer;
a sealing member which covers at least one side surface of the semiconductor construction assembly;
an upper insulating layer which covers the semiconductor construction assembly and the sealing member except for portions corresponding to the columnar electrodes so as to expose an upper surface of each of the columnar electrodes;
upper conductors which are formed on the upper insulating layer, and each of which includes one end that is electrically connected to the pad of one of the conductors via one of the columnar electrodes and at least one external connection pad;
wherein an external connection pad of at least one of the upper conductors is disposed in a region opposing the sealing member; and
wherein upper surfaces of the sealing member and the semiconductor construction assembly are substantially flush with each other.
24. A semiconductor device according to claim 23 , wherein lower surfaces of the sealing member and the semiconductor construction assembly are substantially flush with each other.
25. A semiconductor device according to claim 23 , further comprising a base member which holds the semiconductor construction assembly and the sealing member.