IP Library Granted Patent US 6,979,659
Granted Patent B2
US 6,979,659 · App. 10/829,641 · Granted Dec 27, 2005

Silicon fixture supporting silicon wafers during high temperature processing

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Quick Facts
Patent No.
US 6,979,659
App. No.
10/829,641
Granted
Dec 27, 2005
Kind
B2
Abstract

A process for hydrogen annealing silicon wafers that have been cut from an ingot and polished on both sides, thereby removing crystal originated pits (COPs) in their surface. The wafers are then stacked in a tower having at least support surfaces made from virgin polysilicon, that is, polysilicon form by chemical vapor deposition, preferably from monosilane. The tower may include four virgin polysilicon legs have support teeth slotted at inclined angles along the legs and fixed at their opposed ends to bases. The wafers so supported on the virgin polysilicon towers are annealed in a hydrogen ambient at 1250° C. for 12 hours.

Claims (35)

1. A high-temperature treatment process, comprising the steps of: supporting first sides of a plurality of silicon substrates on a support fixture having support

surfaces consisting essentially of silicon;

disposing said support fixture supporting said silicon substrates in an oven;

flowing an ambient gas comprising hydrogen into said oven; and

treating said silicon substrates in said ambient gas at a temperature of at least 1100° C.

2. The process of claim 1 , wherein said support fixture comprises a plurality of legs extending along respective axes and composed of virgin polysilicon and including teeth projecting at inclined angles from stem portions of said legs, said support surfaces being formed at ends of said teeth to extend perpendicularly to said axes.

3. The process of claim 2 , wherein said inclined angles are in a range of 87 ° to 89½° with respect to said axes.

4. The process of claim 2 , wherein there are four of said legs and said support surfaces are disposed in a square pattern to support said substrates.

5. The process of claim 4 , wherein said support surfaces are disposed in said square pattern at locations located at approximately 0.707 of four radii of said substrate.

6. The process of claim 2 , wherein there are three of said legs and said support surfaces are disposed in an equilateral triangle to support said substrates at locations located at approximately 0.707 of three radii of said substrate.

7. The process of claim 1 , wherein said second sides of said substrates are polished.

8. The process of claim 1 , wherein said substrates are substantially circular silicon wafers, further comprising the prior steps of:

cutting said wafers from one or more silicon ingots; and

polishing at least said second sides of said wafers.

9. A high-temperature wafer processing method, comprising the steps of:

providing a tower comprising

a plurality of silicon legs, extending along respective axes, and each having a plurality of teeth cut therein at inclined angles with respect to said axes and having support areas formed on ends of said teeth to extend perpendicularly to said axes, and two bases fixed to opposed ends of said plurality of legs;

supporting a plurality of substrates on said support areas; and

processing said substrates at a processing temperature of at least 1100° C.

10. The method of claim 9 , wherein said plurality of legs consist of four legs and said support surfaces are disposed in a square pattern about a wafer center.

11. The method of claim 9 , wherein said plurality of legs comprise three legs and said support surfaces are disposed at 0.707 of three wafer radii in an equilateral triangle pattern about a wafer center.

12. The method of claim 9 , wherein said processing includes exposing said wafers to a treatment ambient comprising hydrogen at said processing temperature.

13. The method of claim 9 , wherein said processing temperature is at least 1250° C. and is maintained for an extended predetermined length of time.

14. The method of claim 9 , wherein said legs comprise virgin polysilicon.

15. The method of claim 9 , wherein said inclined angles are in a range of between 87° and 89½°.

16. A wafer supporting tower, comprising:

two bases comprising silicon;

a plurality of legs joined at opposite ends thereof to said two bases and comprising silicon; and

a plurality of slots cut into said legs to form teeth extending from stem portions of said legs at angles of between 87° and 89½° and having support surfaces formed on ends thereof for supporting wafers thereon.

17. The tower of claim 16 , wherein said legs comprise polysilicon.

18. The tower of claim 17 , wherein said polysilicon is virgin polysilicon.

19. The tower of claim 18 , wherein said virgin polysilicon is chlorine-free virgin polysilicon.

20. The tower of claim 16 , wherein said legs consist essentially of silicon.

21. The tower of claim 1 , wherein second sides of said substrates opposite said first sides are substantially monocrystalline.

22. The process of claim 21 , wherein said support fixture comprises a plurality of legs extending along respective axes and composed of virgin polysilicon and including teeth projecting at inclined angles from stem portions of said legs, said support surfaces being formed at ends of said teeth to extend perpendicularly to said axes.

Assignments (10)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2021
From: FERROTEC (USA) CORPORATION
To: HANGZHOU DUNYUANJUXIN SEMICONDUCTOR TECHNOLOGY CO., LTD.
Reel/Frame 058344/0034 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NO. 7409392 PREVIOUSLY RECORDED AT REEL: 024160 FRAME: 0490. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE. Recorded Jul 6, 2015
From: VENTURE LENDING & LEASING IV, INC.
To: INTEGRATED MATERIALS, INC.
Reel/Frame 036066/0114 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8TH TO LAST PATENT NUMBER LISTED IN EXHIBIT B FROM 10642103 TO 10642013 PREVIOUSLY RECORDED ON REEL 016580 FRAME 0308. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded Jul 6, 2015
From: INTEGRATED MATERIALS, INC.
To: VENTURE LENDING & LEASING IV, INC.
Reel/Frame 036074/0185 →
RELEASE OF SECURITY INTEREST Recorded Jul 16, 2010
From: SILICON VALLEY BANK
To: INTEGRATED MATERIALS INC
Reel/Frame 024697/0371 →
SECURITY AGREEMENT Recorded Jun 11, 2010
From: INTEGRATED MATERIALS, INC.
To: FERROTEC (USA) CORPORATION
Reel/Frame 024523/0637 →
SECURITY AGREEMENT Recorded Jun 3, 2010
From: INTEGRATED MATERIALS, INC.
To: SILICON VALLEY BANK
Reel/Frame 024483/0061 →
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2010
From: VENTURE LENDING & LEASING IV, INC.
To: INTEGRATED MATERIALS, INC.
Reel/Frame 024160/0490 →
RELEASE Recorded Mar 29, 2010
From: VENTURE LENDING & LEASING IV, INC.; VENTURE LENDING & LEASING V, INC.
To: INTEGRATED MATERIALS, INC.
Reel/Frame 024160/0454 →
SECURITY AGREEMENT Recorded May 11, 2007
From: INTEGRATED MATERIALS, INC.
To: VENTURE LENDING & LEASING IV, INC.; VENTURE LENDING & LEASING V, INC.
Reel/Frame 019304/0285 →
SECURITY AGREEMENT Recorded May 23, 2005
From: INTEGRATED MATERIALS, INC.
To: VENTURE LENDING & LEASING IV, INC.
Reel/Frame 016580/0308 →