Delay estimation using edge specific miller capacitances

1. A method of estimating delay comprising:

configuring a first signal path and second signal path such that the first signal path is a victim signal path and the second signal path is an aggressor signal path; and

calculating Miller factors between the victim signal path and the aggressor signal path for a plurality of edge combinations between a victim signal edge and an aggressor signal edge;

using the Miller factors to perform a static timing analysis;

iterating the calculating until a timing estimation converges on a desired accuracy;

setting forth a maximum number of analysis iterations; and

iterating the calculating until a timing estimation converges on a desired accuracy is reached or the maximum number of analysis iterations are performed.

2. The method of claim 1 wherein

the plurality of edge combinations include a rising victim edge and a falling aggressor edge and a falling victim edge and a rising aggressor edge.

3. The method of claim 1 wherein

the plurality of edge combinations include a rising victim edge and a rising aggressor edge and a falling victim edge and a falling aggressor edge.

4. The method of claim 1 further comprising:

reversing a directionality of the first signal path and the second signal path such that the first signal path becomes an aggressor and the second signal path becomes a victim; and

calculating Miller factor between a victim signal path and an aggressor signal path for a plurality of edge combinations between a victim signal edge and an aggressor signal edge after the directionality of the victim signal path and the aggressor signal path is reversed.

5. The method of claim 1 further comprising:

identifying a switching window between the victim signal path and the aggressor signal path, the switching window corresponding to an interval of time during which a transition occurs; and

calculating Miller factors using the switching window information.

6. The method of claim 1 further comprising:

determining whether there are any remaining aggressor signal paths interacting with the victim signal path; and

calculating Miller factors between the victim signal path and the additional aggressor signal path for a plurality of edge combinations between a victim signal edge and an additional aggressor signal edge.

7. The method of claim 1 wherein:

the timing analysis includes an early-mode timing analysis.

8. The method of claim 1 wherein:

the timing analysis includes a late-mode timing analysis.

9. An apparatus for estimating delay comprising:

means for configuring a first signal path and second signal path such that the first signal path is a victim signal path and the second signal path is an aggressor signal path; and

means for calculating Miller factors between the victim signal path and the aggressor signal path for a plurality of edge combinations between a victim signal edge and an aggressor signal edge;

means for using the Miller factors to perform a static timing analysis;

means for iterating the calculating until a timing estimation converges on a desired accuracy;

means for setting forth a maximum number of analysis iterations; and

means for iterating the calculating until a timing estimation converges on a desired accuracy is reached or the maximum number of analysis iterations are performed.

10. The apparatus of claim 9 wherein

the plurality of edge combinations include a rising victim edge and a falling aggressor edge and a falling victim edge and a rising aggressor edge.

11. The apparatus of claim 9 wherein

the plurality of edge combinations include a rising victim edge and a rising aggressor edge and a falling victim edge and a falling aggressor edge.

12. The apparatus of claim 9 further comprising:

means for reversing a directionality of the first signal path and the second signal path such that the first signal path becomes an aggressor and the second signal path becomes a victim; and

means for calculating Miller factor between a victim signal path and an aggressor signal path for a plurality of edge combinations between a victim signal edge and an aggressor signal edge after the directionality of the victim signal path and the aggressor signal path is reversed.

13. The apparatus of claim 9 further comprising:

means for identifying a switching window between the victim signal path and the aggressor signal path, the switching window corresponding to an interval of time during which a transition occurs; and

means for calculating Miller factors using the switching window information.

14. The apparatus of claim 9 further comprising:

means for determining whether there are any remaining aggressor signal paths interacting with the victim signal path; and

means for calculating Miller factors between the victim signal path and the additional aggressor signal path for a plurality of edge combinations between a victim signal edge and an additional aggressor signal edge.

15. The apparatus of claim 9 wherein:

the timing analysis includes an early mode timing analysis.

16. The apparatus of claim 9 wherein:

the timing analysis includes a late mode timing analysis.

17. A static timing engine comprising:

timing engine, the timing engine including a Miller factor module, the Miller factor module including:

means for configuring a first signal path and second signal path such that the first signal path is a victim signal path and the second signal path is an aggressor signal path; and

means for calculating Miller factors between the victim signal path and the aggressor signal path for a plurality of edge combinations between a victim signal edge and an aggressor signal edge;

means for using the Miller factors to perform a static timing analysis;

means for iterating the calculating until a timing estimation converges on a desired accuracy;

means for setting forth a maximum number of analysis iterations; and

means for iterating the calculating until a timing estimation converges on a desired accuracy is reached or the maximum number of analysis iterations are performed.