IP Library Granted Patent US 7,945,900
Granted Patent B2
US 7,945,900 · App. 10/835,083 · Granted May 17, 2011

Debugging tool for debugging multi-threaded programs

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Quick Facts
Patent No.
US 7,945,900
App. No.
10/835,083
Granted
May 17, 2011
Kind
B2
Abstract

A method includes running a debugging tool in regard to a program which is undergoing debugging. The program may support multi-threaded operation. The method further includes presenting an option to a user via the debugging tool with respect to a program instruction in a first thread of the program. The program instruction may be for putting an item of data into a queue. The method also includes, if the user exercises the option, identifying a program instruction in a second thread of the program. The second thread is different from the first thread. The identified program instruction in the second thread may be for getting the item of data from the queue. The method further includes stopping execution of the program at the identified program instruction in the second thread.

Claims (40)

1. A method comprising:

running a debugging tool in regard to a program which is undergoing debugging, the program supporting multi-threaded operation;

presenting an option to a user via the debugging tool with respect to a program instruction in a first thread of the program, the program instruction for putting an item of data into a queue at a first memory address;

responsive to the user exercising the option, setting conditional breakpoints for a plurality of program instructions for getting the item of data from the queue, the plurality of program instructions being in a second thread of the program, the second thread being different from the first thread;

executing the program;

responsive to reaching a conditional breakpoint during execution, identifying if the program instruction for the conditional breakpoint includes a second memory address that matches the first memory address; and

if the program instruction for the conditional breakpoint includes the second memory address, stopping execution of the program at the identified program instruction in the second thread; or

if the program instruction for the conditional breakpoint does not include the second memory address, continuing to execute the program until reaching a program instruction for another conditional breakpoint.

2. The method of claim 1 , wherein the option is indicated to the user as a “step across” option.

3. The method of claim 1 , further comprising:

at the time of execution of the identified program instruction in the second thread, examining at least one of: (a) a current value of at least one variable of the program, and (b) content of at least one memory location.

4. The method of claim 1 , wherein the identifying includes:

identifying a “get” program instruction in the second thread of the program; and

determining that the “get” program instruction operates with respect to a memory address that matches a memory address to which the program instruction in the first thread of the program put the item of data.

5. An apparatus comprising:

at least one processor;

at least one memory coupled to the at least one processor, the at least one memory to store a debugging tool and a program which is to undergo debugging, the program to support multi-threaded operation, the at least one processor operative with the debugging tool and the program to:

present an option to a user via the debugging tool with respect to a program instruction in a first thread of the program, the program instruction for putting an item of data into a queue at a first memory address;

responsive to the user exercising the option, setting conditional breakpoints for a plurality of program instructions for getting the item of data from the queue, the plurality of program instructions beinq in a second thread of the program, the second thread being different from the first thread;

execute the program;

responsive to a conditional breakpoint being reached during execution, identify if the program instruction for the conditional breakpoint includes a second memory address that matches the first memory address; and

if the program instruction for the conditional breakpoint includes the second memory address, stop execution of the program at the identified program instruction in the second thread; or

if the program instruction for the conditional breakpoint does not include the second memory address, continue to execute the program until reaching a program instruction for another conditional breakpoint.

6. The apparatus of claim 5 , wherein the option is indicated to the user as a “step across” option.

7. The apparatus of claim 5 , wherein the identifying includes:

identifying a “get” program instruction in the second thread of the program; and

determining that the “get” program instruction operates with respect to a memory address that matches a memory address to which the program instruction in the first thread of the program put the item of data.

8. An apparatus comprising:

a storage medium having stored thereon instructions that when executed by a machine result in the following:

running a debugging tool in regard to a program which is undergoing debugging, the program supporting multi-threaded operation;

presenting an option to a user via the debugging tool with respect to a program instruction in a first thread of the program, the program instruction for putting an item of data into a queue at a first memory address;

responsive to the user exercising the option, setting conditional breakpoints for a plurality of program instructions for getting the item of data from the queue, the plurality of program instructions being in a second thread of the program, the second thread being different from the first thread;

executing the program;

responsive to reaching a conditional breakpoint, identifying if the program instruction for the conditional breakpoint includes a second memory address that matches the first memory address; and

if the program instruction for the conditional breakpoint includes the second memory address, stopping execution of the program at the identified program instruction in the second thread; or

if the program instruction for the conditional breakpoint does not include the second memory address, continuing to execute the program until reaching a program instruction for another conditional breakpoint.

9. The apparatus of claim 8 , wherein the option is indicated to the user as a “step across” option.

10. The apparatus of claim 8 , wherein the identifying includes:

identifying a “get” program instruction in the second thread of the program; and

determining that the “get” program instruction operates with respect to a memory address that matches a memory address to which the program instruction in the first thread of the program put the item of data.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053475/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2020
From: MARVELL INTERNATIONAL LTD.
To: CAVIUM INTERNATIONAL
Reel/Frame 052918/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2006
From: INTEL CORPORATION
To: MARVELL INTERNATIONAL LTD.
Reel/Frame 018515/0817 →