IP Library Granted Patent US 7,002,402
Granted Patent B2
US 7,002,402 · App. 10/835,402 · Granted Feb 21, 2006

Method of producing a desired current

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Quick Facts
Patent No.
US 7,002,402
App. No.
10/835,402
Granted
Feb 21, 2006
Kind
B2
Abstract

A current source DAC has calibration of the current sources used for providing the analog output. There are two outputs, one of which provides the output current or else a differential output is provided. The calibration is cyclic and the current source outputs switched to the output terminals are selected as a function of the point within the calibration cycle. The current stage of the cyclic calibration process is thus taken into account in the D/A conversion. For example, the average time since calibration for all current sources having outputs switched to the first output may be approximately equal to the average time since calibration for all current sources having outputs switched to the second output. In this way, the average current of the cells switched to one terminal is identical to the average current of the cells switched to the other terminal, and the average current of the cells switched to each terminal remains constant in time irrespective of the digital signal value being converted. This ensures DAC linearity.

Claims (11)

1. A method, comprising:

(a) forming a current source with first and second transistors;

(b) producing a smaller output current with the first transistor than with the second transistor;

(c) varying a value of a reference voltage input to the first transistor to adjust an output current produced by the current source;

(d) performing step (c) until a desired output current is achieved based on the reference voltage;

(e) providing an unswitched fixed gate voltage to the second transistor.

2. The method of claim 1 , wherein step (b) comprises providing the first transistor with smaller dimensions than the second transistor.

3. The method of claim 1 , wherein step (c) comprises providing the reference voltage to a gate of the first transistor.

4. The method of claim 1 , further comprising converting a reference current from a reference current source to generate the reference voltage.

5. The method of claim 1 , further comprising forming an array of current sources and cyclically performing steps (b), (c), and (d) for each current source in the array of current sources.

6. The method of claim 1 , wherein the current source is calibrated by performing steps (b), (c), and (d).

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0097. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048555/0510 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0097 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 30, 2004
From: BOXHO, JEAN
To: BROADCOM CORPORATION
Reel/Frame 015289/0430 →