IP Library Granted Patent US 7,012,284
Granted Patent B2
US 7,012,284 · App. 10/837,780 · Granted Mar 14, 2006

Nitride semiconductor light emitting device and method of manufacturing the same

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,012,284
App. No.
10/837,780
Granted
Mar 14, 2006
Kind
B2
Abstract

Disclosed herein is a nitride semiconductor light emitting device. The nitride semiconductor light emitting device comprises an n-type nitride semiconductor layer on a substrate, an active layer formed on the n-type nitride semiconductor layer so that a portion of the n-type nitride semiconductor layer is exposed, a p-type nitride semiconductor layer formed on the active layer, a high-concentration dopant area on the p-type nitride semiconductor layer, a counter doping area on the high-concentration dopant areas, an n-side electrode formed on an exposed portion of the n-type nitride semiconductor layer, and a p-side electrode formed on the counter doping area. A satisfactory ohmic contact for the p-side electrode is provided by an ion implantation process and heat treatment.

Claims (37)

1. A nitride semiconductor light emitting device, comprising:

an n-type nitride semiconductor layer formed on a substrate;

an active layer formed on the n-type nitride semiconductor layer so that a portion of the n-type nitride semiconductor layer is exposed;

a p-type nitride semiconductor layer formed on the active layer;

a high-concentration dopant area formed by doping p-type dopant in a high concentration on the p-type nitride semiconductor layer;

a counter doping area formed by doping n-type dopant in a high concentration on the high-concentration dopant area;

an n-side electrode formed on an exposed portion of the n-type nitride semiconductor layer; and

a p-side electrode formed on the counter doping area.

2. The device as set forth in claim 1 , wherein the p-type dopant in the high-concentration dopant area comprises at least one selected from the group of Zn, Be, Mg and Cd.

3. The device as set forth in claim 1 , wherein the n-type dopant in the counter doping area comprises Si.

4. The device as set forth in claim 1 , wherein the p-side electrode comprises Al and Ti.

5. The device as set forth in claim 1 , wherein the p-type dopant in the high-concentration dopant area has a concentration of 1×10 18 ˜1×10 19 /cm 3 .

6. The device as set forth in claim 5 , wherein the n-type dopant in the counter doping area has a concentration of 1×10 18 ˜1×10 20 /cm 3 .

7. The device as set forth in claim 1 , wherein the p-type nitride semiconductor layer has a thickness of 0.2˜0.5 μm.

8. The device as set forth in claim 7 , wherein the high-concentration dopant area has a thickness of 0.01˜0.1 μm.

9. The device as set forth in claim 8 , wherein the counter doping area has a thickness of 0.01˜0.1 μm.

10. The device as set forth in claim 1 , wherein the high-concentration dopant area and the counter doping area are formed using an ion implantation process on the p-type clad layer and a heat treatment process.

11. A method of manufacturing the nitride semiconductor light emitting device, comprising the steps of:

a) forming an n-type nitride semiconductor layer on a substrate;

b) forming an active layer on the n-type nitride semiconductor layer so that a portion of the n-type nitride semiconductor layer is exposed;

c) forming a p-type nitride semiconductor layer on the active layer;

d) forming a high-concentration dopant area by doping p-type dopant in a high concentration on the p-type nitride semiconductor layer, and a counter doping area by doping n-type dopant in a high concentration on the high-concentration dopant area; and

e) forming an n-side electrode and a p-side electrode on an exposed portion of the n-type nitride semiconductor layer and on the counter doping area, respectively.

12. The method as set forth in claim 11 , wherein the p-type type dopant in the high-concentration dopant area comprises at least one selected from the group of Zn, Be, Mg and Cd.

13. The method as set forth in claim 11 , wherein the n-type dopant in the counter doping area comprises Si.

14. The method as set forth in claim 11 , wherein the p-side electrode comprises Al and Ti.

15. The method as set forth in claim 11 , wherein the p-type dopant in the high-concentration dopant area has a concentration of 1×10 18 ˜1×10 19 /cm 3 .

16. The method as set forth in claim 15 , wherein the n-type dopant in the counter doping area has a concentration of 1×10 18 ˜1×10 20 /cm 3 .

17. The method as set forth in claim 11 , wherein the p-type nitride semiconductor layer has a thickness of 0.2˜0.5 μm.

18. The method as set forth in claim 17 , wherein the high-concentration dopant area has a thickness of 0.01˜0.1 μm.

19. The method as set forth in claim 18 , wherein the counter doping area has a thickness of 0.01˜0.1 μm.

20. The method as set forth in claim 11 , wherein the step d) comprises the steps of:

d-1) implanting p-type dopant ions in a high concentration on the p-type nitride semiconductor layer;

d-2) implanting n-type dopant ions in a high concentration on the p-type dopant area; and

d-3) rapid thermal annealing the n-type dopant area and the p-type dopant area, which are doped in a high concentration.

21. The method as set forth in claim 20 , wherein the step d-1) and the step d-2) comprise the step of implanting the respective dopant ions with an energy of about 100˜200 KeV, respectively.

22. The method as set forth in claim 20 , wherein the step d-3) comprises the step of rapid thermal annealing at a temperature of about 600˜1,200° C.

Assignments (3)
MERGER Recorded Aug 7, 2012
From: SAMSUNG LED CO., LTD.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 028744/0272 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2010
From: SAMSUNG ELECTRO-MECHANICS CO., LTD.
To: SAMSUNG LED CO., LTD.
Reel/Frame 024723/0532 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2004
From: CHOI, SEOK BEOM; OH, BANG WON; CHOI, HEE SEOK
To: SAMSUNG ELECTRO-MECHANICS CO. LTD.
Reel/Frame 015299/0124 →